MT8173 overlay can support UYVY and YUYV format,
we add the format in DRM driver.

Signed-off-by: Bibby Hsieh <bibby.hsieh at mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz at chromium.org>
---
 drivers/gpu/drm/mediatek/mtk_disp_ovl.c  | 21 +++++++++++++++++++++
 drivers/gpu/drm/mediatek/mtk_drm_plane.c |  2 ++
 2 files changed, 23 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c 
b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index c703102..de05845 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
@@ -40,10 +40,13 @@
 #define        OVL_RDMA_MEM_GMC        0x40402020

 #define OVL_CON_BYTE_SWAP      BIT(24)
+#define OVL_CON_MTX_YUV_TO_RGB (6 << 16)
 #define OVL_CON_CLRFMT_RGB565  (0 << 12)
 #define OVL_CON_CLRFMT_RGB888  (1 << 12)
 #define OVL_CON_CLRFMT_RGBA8888        (2 << 12)
 #define OVL_CON_CLRFMT_ARGB8888        (3 << 12)
+#define OVL_CON_CLRFMT_UYVY    (4 << 12)
+#define OVL_CON_CLRFMT_YUYV    (5 << 12)
 #define        OVL_CON_AEN             BIT(8)
 #define        OVL_CON_ALPHA           0xff

@@ -162,6 +165,21 @@ static unsigned int ovl_fmt_convert(unsigned int fmt)
        case DRM_FORMAT_XBGR8888:
        case DRM_FORMAT_ABGR8888:
                return OVL_CON_CLRFMT_RGBA8888 | OVL_CON_BYTE_SWAP;
+       case DRM_FORMAT_UYVY:
+               return OVL_CON_CLRFMT_UYVY;
+       case DRM_FORMAT_YUYV:
+               return OVL_CON_CLRFMT_YUYV;
+       }
+}
+
+static bool ovl_yuv_space(unsigned int fmt)
+{
+       switch (fmt) {
+       case DRM_FORMAT_UYVY:
+       case DRM_FORMAT_YUYV:
+               return true;
+       default:
+               return false;
        }
 }

@@ -183,6 +201,9 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, 
unsigned int idx,
        if (idx != 0)
                con |= OVL_CON_AEN | OVL_CON_ALPHA;

+       if (ovl_yuv_space(fmt))
+               con |= OVL_CON_MTX_YUV_TO_RGB;
+
        writel_relaxed(con, comp->regs + DISP_REG_OVL_CON(idx));
        writel_relaxed(pitch, comp->regs + DISP_REG_OVL_PITCH(idx));
        writel_relaxed(src_size, comp->regs + DISP_REG_OVL_SRC_SIZE(idx));
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c 
b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
index c461a23..8c02d1d 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
@@ -28,6 +28,8 @@
        DRM_FORMAT_XRGB8888,
        DRM_FORMAT_ARGB8888,
        DRM_FORMAT_RGB565,
+       DRM_FORMAT_UYVY,
+       DRM_FORMAT_YUYV,
 };

 static void mtk_plane_reset(struct drm_plane *plane)
-- 
1.9.1

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