Remove the delayed worker, opting instead for the non-delayed
variety. Also introduce a lock to ensure we don't have races
with the worker and psr_state. Finally, cancel and wait for
the worker to finish when disabling the bridge.
Signed-off-by: Sean Paul <seanpaul at chromium.org>
---
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 1 -
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 24 ++++++++++++++--------
2 files changed, 16 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 6a5dd84..2f4d76b 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -105,7 +105,6 @@ int analogix_dp_enable_psr(struct device *dev)
if (!dp->psr_support)
return -EINVAL;
-
/* Prepare VSC packet as per EDP 1.4 spec, Table 6.9 */
memset(&psr_vsc, 0, sizeof(psr_vsc));
psr_vsc.sdp_header.HB0 = 0;
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 9586de2..8c44dba 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -35,7 +35,6 @@
#include "rockchip_drm_psr.h"
#include "rockchip_drm_vop.h"
-#define PSR_SET_DELAY_TIME msecs_to_jiffies(10)
#define PSR_WAIT_LINE_FLAG_TIMEOUT_MS 100
#define to_dp(nm) container_of(nm, struct rockchip_dp_device, nm)
@@ -64,7 +63,8 @@ struct rockchip_dp_device {
struct regmap *grf;
struct reset_control *rst;
- struct delayed_work psr_work;
+ struct work_struct psr_work;
+ spinlock_t psr_lock;
unsigned int psr_state;
const struct rockchip_dp_chip_data *data;
@@ -75,30 +75,34 @@ struct rockchip_dp_device {
static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
{
struct rockchip_dp_device *dp = to_dp(encoder);
+ unsigned long flags;
dev_dbg(dp->dev, "%s PSR...\n", enabled ? "Entry" : "Exit");
+ spin_lock_irqsave(&dp->psr_lock, flags);
if (enabled)
dp->psr_state = EDP_VSC_PSR_STATE_ACTIVE;
else
dp->psr_state = ~EDP_VSC_PSR_STATE_ACTIVE;
- schedule_delayed_work(&dp->psr_work, PSR_SET_DELAY_TIME);
+ schedule_work(&dp->psr_work);
+ spin_unlock_irqrestore(&dp->psr_lock, flags);
}
static void analogix_dp_psr_work(struct work_struct *work)
{
struct rockchip_dp_device *dp =
- container_of(work, typeof(*dp), psr_work.work);
+ container_of(work, typeof(*dp), psr_work);
struct drm_crtc *crtc = dp->encoder.crtc;
- int psr_state = dp->psr_state;
int vact_end;
int ret;
+ unsigned long flags;
if (!crtc)
return;
- vact_end = crtc->mode.vtotal - crtc->mode.vsync_start +
crtc->mode.vdisplay;
+ vact_end = crtc->mode.vtotal - crtc->mode.vsync_start +
+ crtc->mode.vdisplay;
ret = rockchip_drm_wait_line_flag(dp->encoder.crtc, vact_end,
PSR_WAIT_LINE_FLAG_TIMEOUT_MS);
@@ -107,10 +111,12 @@ static void analogix_dp_psr_work(struct work_struct *work)
return;
}
- if (psr_state == EDP_VSC_PSR_STATE_ACTIVE)
+ spin_lock_irqsave(&dp->psr_lock, flags);
+ if (dp->psr_state == EDP_VSC_PSR_STATE_ACTIVE)
analogix_dp_enable_psr(dp->dev);
else
analogix_dp_disable_psr(dp->dev);
+ spin_unlock_irqrestore(&dp->psr_lock, flags);
}
static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
@@ -146,6 +152,7 @@ static int rockchip_dp_powerdown(struct
analogix_dp_plat_data *plat_data)
{
struct rockchip_dp_device *dp = to_dp(plat_data);
+ cancel_work_sync(&dp->psr_work);
clk_disable_unprepare(dp->pclk);
return 0;
@@ -390,8 +397,9 @@ static int rockchip_dp_bind(struct device *dev, struct
device *master,
dp->plat_data.power_off = rockchip_dp_powerdown;
dp->plat_data.get_modes = rockchip_dp_get_modes;
+ spin_lock_init(&dp->psr_lock);
dp->psr_state = ~EDP_VSC_PSR_STATE_ACTIVE;
- INIT_DELAYED_WORK(&dp->psr_work, analogix_dp_psr_work);
+ INIT_WORK(&dp->psr_work, analogix_dp_psr_work);
rockchip_drm_psr_register(&dp->encoder, analogix_dp_psr_set);
--
2.8.0.rc3.226.g39d4020
