On Mon, 26 Sep 2011 23:11:37 -0700, Keith Packard <kei...@keithp.com> wrote: > Ok, so I'd love to know where in any PCH reference matter someone has > found a place where the reference clock for any of the PLLs is > anything other than 120MHz. Can someone find a reference for other > frequencies?
Oddly in the diagram SSC4 is given as a 100MHz clock that can be used for any output other than DP_A. However, the configuration register marks that as being a test-only mode. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
