Am 10.04.2016 um 16:29 schrieb Nils Wallménius:
> This patch marks some compile-time constant tables 'const'.
> The tables marked in this patch are the low hanging fruit
> where little other changes were necesary to avoid casting
> away constness etc. Also mark some tables that are private
> to a file as static.
>
> Signed-off-by: Nils Wallménius <nils.wallmenius at gmail.com>
Nice cleanup, for the series Reviewed-by: Christian König
<christian.koenig at amd.com>
Thanks,
Christian.
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 +++---
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +-
> drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 12 ++++++------
> drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.h | 2 +-
> drivers/gpu/drm/amd/powerplay/hwmgr/fiji_powertune.c | 10 +++++-----
> drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c | 8 ++++----
> drivers/gpu/drm/amd/powerplay/inc/fiji_pwrvirus.h | 2 +-
> drivers/gpu/drm/amd/powerplay/smumgr/cz_smumgr.c | 2 +-
> drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | 6 +++---
> drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c | 2 +-
> 13 files changed, 29 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 66e51f9..5d05b5d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -2348,7 +2348,7 @@ static inline void amdgpu_unregister_atpx_handler(void)
> {}
> * KMS
> */
> extern const struct drm_ioctl_desc amdgpu_ioctls_kms[];
> -extern int amdgpu_max_kms_ioctl;
> +extern const int amdgpu_max_kms_ioctl;
>
> int amdgpu_driver_load_kms(struct drm_device *dev, unsigned long flags);
> int amdgpu_driver_unload_kms(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> index 0535095..c835abe 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> @@ -596,20 +596,20 @@ const struct drm_mode_config_funcs amdgpu_mode_funcs = {
> .output_poll_changed = amdgpu_output_poll_changed
> };
>
> -static struct drm_prop_enum_list amdgpu_underscan_enum_list[] =
> +static const struct drm_prop_enum_list amdgpu_underscan_enum_list[] =
> { { UNDERSCAN_OFF, "off" },
> { UNDERSCAN_ON, "on" },
> { UNDERSCAN_AUTO, "auto" },
> };
>
> -static struct drm_prop_enum_list amdgpu_audio_enum_list[] =
> +static const struct drm_prop_enum_list amdgpu_audio_enum_list[] =
> { { AMDGPU_AUDIO_DISABLE, "off" },
> { AMDGPU_AUDIO_ENABLE, "on" },
> { AMDGPU_AUDIO_AUTO, "auto" },
> };
>
> /* XXX support different dither options? spatial, temporal, both, etc. */
> -static struct drm_prop_enum_list amdgpu_dither_enum_list[] =
> +static const struct drm_prop_enum_list amdgpu_dither_enum_list[] =
> { { AMDGPU_FMT_DITHER_DISABLE, "off" },
> { AMDGPU_FMT_DITHER_ENABLE, "on" },
> };
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index f1e17d6..2d9dbc2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -166,7 +166,7 @@ module_param_named(pcie_gen_cap, amdgpu_pcie_gen_cap,
> uint, 0444);
> MODULE_PARM_DESC(pcie_lane_cap, "PCIE Lane Caps (0: autodetect (default))");
> module_param_named(pcie_lane_cap, amdgpu_pcie_lane_cap, uint, 0444);
>
> -static struct pci_device_id pciidlist[] = {
> +static const struct pci_device_id pciidlist[] = {
> #ifdef CONFIG_DRM_AMDGPU_CIK
> /* Kaveri */
> {0x1002, 0x1304, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
> CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> index 762cfdb..9266c7b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> @@ -498,7 +498,7 @@ static int amdgpu_irqdomain_map(struct irq_domain *d,
> return 0;
> }
>
> -static struct irq_domain_ops amdgpu_hw_irqdomain_ops = {
> +static const struct irq_domain_ops amdgpu_hw_irqdomain_ops = {
> .map = amdgpu_irqdomain_map,
> };
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index 7805a87..1f9d318 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -754,4 +754,4 @@ const struct drm_ioctl_desc amdgpu_ioctls_kms[] = {
> DRM_IOCTL_DEF_DRV(AMDGPU_GEM_OP, amdgpu_gem_op_ioctl,
> DRM_AUTH|DRM_RENDER_ALLOW),
> DRM_IOCTL_DEF_DRV(AMDGPU_GEM_USERPTR, amdgpu_gem_userptr_ioctl,
> DRM_AUTH|DRM_RENDER_ALLOW),
> };
> -int amdgpu_max_kms_ioctl = ARRAY_SIZE(amdgpu_ioctls_kms);
> +const int amdgpu_max_kms_ioctl = ARRAY_SIZE(amdgpu_ioctls_kms);
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
> index 025a3ed..55a006d 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
> @@ -95,23 +95,23 @@ enum DPM_EVENT_SRC {
> /* [2.5%,~2.5%] Clock stretched is multiple of 2.5% vs
> * not and [Fmin, Fmax, LDO_REFSEL, USE_FOR_LOW_FREQ]
> */
> -uint16_t fiji_clock_stretcher_lookup_table[2][4] = { {600, 1050, 3, 0},
> - {600, 1050, 6, 1} };
> +static const uint16_t fiji_clock_stretcher_lookup_table[2][4] =
> +{ {600, 1050, 3, 0}, {600, 1050, 6, 1} };
>
> /* [FF, SS] type, [] 4 voltage ranges, and
> * [Floor Freq, Boundary Freq, VID min , VID max]
> */
> -uint32_t fiji_clock_stretcher_ddt_table[2][4][4] =
> +static const uint32_t fiji_clock_stretcher_ddt_table[2][4][4] =
> { { {265, 529, 120, 128}, {325, 650, 96, 119}, {430, 860, 32, 95}, {0, 0,
> 0, 31} },
> { {275, 550, 104, 112}, {319, 638, 96, 103}, {360, 720, 64, 95}, {384,
> 768, 32, 63} } };
>
> /* [Use_For_Low_freq] value, [0%, 5%, 10%, 7.14%, 14.28%, 20%]
> * (coming from PWR_CKS_CNTL.stretch_amount reg spec)
> */
> -uint8_t fiji_clock_stretch_amount_conversion[2][6] = { {0, 1, 3, 2, 4, 5},
> - {0, 2, 4, 5, 6, 5} };
> +static const uint8_t fiji_clock_stretch_amount_conversion[2][6] =
> +{ {0, 1, 3, 2, 4, 5}, {0, 2, 4, 5, 6, 5} };
>
> -const unsigned long PhwFiji_Magic = (unsigned long)(PHM_VIslands_Magic);
> +static const unsigned long PhwFiji_Magic = (unsigned
> long)(PHM_VIslands_Magic);
>
> struct fiji_power_state *cast_phw_fiji_power_state(
> struct pp_hw_power_state *hw_ps)
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.h
> b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.h
> index a16f7cd..4b29d9e 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.h
> @@ -263,7 +263,7 @@ struct fiji_hwmgr {
> bool enable_tdc_limit_feature;
> bool enable_pkg_pwr_tracking_feature;
> bool disable_uvd_power_tune_feature;
> - struct fiji_pt_defaults *power_tune_defaults;
> + const struct fiji_pt_defaults *power_tune_defaults;
> struct SMU73_Discrete_PmFuses power_tune_table;
> uint32_t dte_tj_offset;
> uint32_t fast_watermark_threshold;
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_powertune.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_powertune.c
> index 6efcb2b..db23a40 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_powertune.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_powertune.c
> @@ -32,7 +32,7 @@
> #define VOLTAGE_SCALE 4
> #define POWERTUNE_DEFAULT_SET_MAX 1
>
> -struct fiji_pt_defaults
> fiji_power_tune_data_set_array[POWERTUNE_DEFAULT_SET_MAX] = {
> +const struct fiji_pt_defaults
> fiji_power_tune_data_set_array[POWERTUNE_DEFAULT_SET_MAX] = {
> /*sviLoadLIneEn, SviLoadLineVddC,
> TDC_VDDC_ThrottleReleaseLimitPerc */
> {1, 0xF, 0xFD,
> /* TDC_MAWt, TdcWaterfallCtl, DTEAmbientTempBase */
> @@ -143,7 +143,7 @@ static void get_scl_sda_value(uint8_t line, uint8_t *scl,
> uint8_t* sda)
> int fiji_populate_bapm_parameters_in_dpm_table(struct pp_hwmgr *hwmgr)
> {
> struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
> - struct fiji_pt_defaults *defaults = data->power_tune_defaults;
> + const struct fiji_pt_defaults *defaults = data->power_tune_defaults;
> SMU73_Discrete_DpmTable *dpm_table = &(data->smc_state_table);
> struct phm_ppt_v1_information *table_info =
> (struct phm_ppt_v1_information *)(hwmgr->pptable);
> @@ -222,7 +222,7 @@ int fiji_populate_bapm_parameters_in_dpm_table(struct
> pp_hwmgr *hwmgr)
> static int fiji_populate_svi_load_line(struct pp_hwmgr *hwmgr)
> {
> struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
> - struct fiji_pt_defaults *defaults = data->power_tune_defaults;
> + const struct fiji_pt_defaults *defaults = data->power_tune_defaults;
>
> data->power_tune_table.SviLoadLineEn = defaults->SviLoadLineEn;
> data->power_tune_table.SviLoadLineVddC = defaults->SviLoadLineVddC;
> @@ -238,7 +238,7 @@ static int fiji_populate_tdc_limit(struct pp_hwmgr *hwmgr)
> struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
> struct phm_ppt_v1_information *table_info =
> (struct phm_ppt_v1_information *)(hwmgr->pptable);
> - struct fiji_pt_defaults *defaults = data->power_tune_defaults;
> + const struct fiji_pt_defaults *defaults = data->power_tune_defaults;
>
> /* TDC number of fraction bits are changed from 8 to 7
> * for Fiji as requested by SMC team
> @@ -256,7 +256,7 @@ static int fiji_populate_tdc_limit(struct pp_hwmgr *hwmgr)
> static int fiji_populate_dw8(struct pp_hwmgr *hwmgr, uint32_t
> fuse_table_offset)
> {
> struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
> - struct fiji_pt_defaults *defaults = data->power_tune_defaults;
> + const struct fiji_pt_defaults *defaults = data->power_tune_defaults;
> uint32_t temp;
>
> if (fiji_read_smc_sram_dword(hwmgr->smumgr,
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
> index fee7835..2e99a14 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
> @@ -86,17 +86,17 @@
> typedef uint32_t PECI_RegistryValue;
>
> /* [2.5%,~2.5%] Clock stretched is multiple of 2.5% vs not and [Fmin, Fmax,
> LDO_REFSEL, USE_FOR_LOW_FREQ] */
> -uint16_t PP_ClockStretcherLookupTable[2][4] = {
> +static const uint16_t PP_ClockStretcherLookupTable[2][4] = {
> {600, 1050, 3, 0},
> {600, 1050, 6, 1} };
>
> /* [FF, SS] type, [] 4 voltage ranges, and [Floor Freq, Boundary Freq, VID
> min , VID max] */
> -uint32_t PP_ClockStretcherDDTTable[2][4][4] = {
> +static const uint32_t PP_ClockStretcherDDTTable[2][4][4] = {
> { {265, 529, 120, 128}, {325, 650, 96, 119}, {430, 860, 32, 95}, {0, 0,
> 0, 31} },
> { {275, 550, 104, 112}, {319, 638, 96, 103}, {360, 720, 64, 95}, {384,
> 768, 32, 63} } };
>
> /* [Use_For_Low_freq] value, [0%, 5%, 10%, 7.14%, 14.28%, 20%] (coming from
> PWR_CKS_CNTL.stretch_amount reg spec) */
> -uint8_t PP_ClockStretchAmountConversion[2][6] = {
> +static const uint8_t PP_ClockStretchAmountConversion[2][6] = {
> {0, 1, 3, 2, 4, 5},
> {0, 2, 4, 5, 6, 5} };
>
> @@ -110,7 +110,7 @@ enum DPM_EVENT_SRC {
> };
> typedef enum DPM_EVENT_SRC DPM_EVENT_SRC;
>
> -const unsigned long PhwTonga_Magic = (unsigned long)(PHM_VIslands_Magic);
> +static const unsigned long PhwTonga_Magic = (unsigned
> long)(PHM_VIslands_Magic);
>
> struct tonga_power_state *cast_phw_tonga_power_state(
> struct pp_hw_power_state *hw_ps)
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/fiji_pwrvirus.h
> b/drivers/gpu/drm/amd/powerplay/inc/fiji_pwrvirus.h
> index 0262ad3..8a31665 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/fiji_pwrvirus.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/fiji_pwrvirus.h
> @@ -46,7 +46,7 @@ struct PWR_Command_Table
> typedef struct PWR_Command_Table PWR_Command_Table;
>
> #define PWR_VIRUS_TABLE_SIZE 10243
> -static PWR_Command_Table PwrVirusTable[PWR_VIRUS_TABLE_SIZE] =
> +static const PWR_Command_Table PwrVirusTable[PWR_VIRUS_TABLE_SIZE] =
> {
> { PwrCmdWrite, 0x100100b6, mmPCIE_INDEX },
> { PwrCmdWrite, 0x00000000, mmPCIE_DATA },
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/cz_smumgr.c
> b/drivers/gpu/drm/amd/powerplay/smumgr/cz_smumgr.c
> index ec222c6..da18f44 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/cz_smumgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/cz_smumgr.c
> @@ -39,7 +39,7 @@
>
> #define SIZE_ALIGN_32(x) (((x) + 31) / 32 * 32)
>
> -static enum cz_scratch_entry firmware_list[] = {
> +static const enum cz_scratch_entry firmware_list[] = {
> CZ_SCRATCH_ENTRY_UCODE_ID_SDMA0,
> CZ_SCRATCH_ENTRY_UCODE_ID_SDMA1,
> CZ_SCRATCH_ENTRY_UCODE_ID_CP_CE,
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
> b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
> index cdbb9f8..673a75c 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
> @@ -44,7 +44,7 @@
>
> #define FIJI_SMC_SIZE 0x20000
>
> -struct SMU73_Discrete_GraphicsLevel avfs_graphics_level[8] = {
> +static const struct SMU73_Discrete_GraphicsLevel avfs_graphics_level[8] = {
> /* Min Sclk pcie DeepSleep Activity CgSpll
> CgSpll spllSpread SpllSpread CcPwr CcPwr Sclk Display
> Enabled Enabled Voltage Power */
> /* Voltage, Frequency, DpmLevel, DivId, Level,
> FuncCntl3, FuncCntl4, Spectrum, Spectrum2, DynRm, DynRm1 Did,
> Watermark, ForActivity, ForThrottle, UpHyst, DownHyst, DownHyst, Throttle */
> { 0x3c0fd047, 0x30750000, 0x00, 0x03, 0x1e00,
> 0x00200410, 0x87020000, 0x21680000, 0x0c000000, 0, 0, 0x16, 0x00,
> 0x01, 0x01, 0x00, 0x00, 0x00, 0x00 },
> @@ -189,7 +189,7 @@ int fiji_copy_bytes_to_smc(struct pp_smumgr *smumgr,
>
> int fiji_program_jump_on_start(struct pp_smumgr *smumgr)
> {
> - static unsigned char data[] = { 0xE0, 0x00, 0x80, 0x40 };
> + static const unsigned char data[] = { 0xE0, 0x00, 0x80, 0x40 };
>
> fiji_copy_bytes_to_smc(smumgr, 0x0, data, 4, sizeof(data) + 1);
>
> @@ -665,7 +665,7 @@ int fiji_setup_pwr_virus(struct pp_smumgr *smumgr)
> {
> int i, result = -1;
> uint32_t reg, data;
> - PWR_Command_Table *virus = PwrVirusTable;
> + const PWR_Command_Table *virus = PwrVirusTable;
> struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend);
>
> priv->avfs.AvfsBtcStatus = AVFS_LOAD_VIRUS;
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
> b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
> index ebdb43a..32820b6 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
> @@ -145,7 +145,7 @@ out:
>
> int tonga_program_jump_on_start(struct pp_smumgr *smumgr)
> {
> - static unsigned char pData[] = { 0xE0, 0x00, 0x80, 0x40 };
> + static const unsigned char pData[] = { 0xE0, 0x00, 0x80, 0x40 };
>
> tonga_copy_bytes_to_smc(smumgr, 0x0, pData, 4, sizeof(pData)+1);
>
