Needed to enable device access to OCMEM.

Signed-off-by: Rob Clark <robdclark at gmail.com>
---
 drivers/firmware/qcom_scm-32.c | 34 ++++++++++++++++++++++++++++++++++
 drivers/firmware/qcom_scm-64.c | 11 +++++++++++
 drivers/firmware/qcom_scm.c    | 39 +++++++++++++++++++++++++++++++++++++++
 drivers/firmware/qcom_scm.h    |  7 +++++++
 include/linux/qcom_scm.h       |  4 ++++
 5 files changed, 95 insertions(+)

diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c
index a7bf6d4..dc84771b 100644
--- a/drivers/firmware/qcom_scm-32.c
+++ b/drivers/firmware/qcom_scm-32.c
@@ -520,6 +520,40 @@ int __qcom_scm_restore_sec_config(u32 sec_id, u32 
ctx_bank_num)
        return 0;
 }

+int __qcom_scm_ocmem_lock(u32 id, u32 offset, u32 size, u32 mode)
+{
+       struct ocmem_tz_lock {
+               __le32 id;
+               __le32 offset;
+               __le32 size;
+               __le32 mode;
+       } request;
+
+       request.id     = cpu_to_le32(id);
+       request.offset = cpu_to_le32(offset);
+       request.size   = cpu_to_le32(size);
+       request.mode   = cpu_to_le32(mode);
+
+       return qcom_scm_call(QCOM_SCM_OCMEM_SVC, QCOM_SCM_OCMEM_LOCK_CMD,
+                       &request, sizeof(request), NULL, 0);
+}
+
+int __qcom_scm_ocmem_unlock(u32 id, u32 offset, u32 size)
+{
+       struct ocmem_tz_unlock {
+               __le32 id;
+               __le32 offset;
+               __le32 size;
+       } request;
+
+       request.id     = cpu_to_le32(id);
+       request.offset = cpu_to_le32(offset);
+       request.size   = cpu_to_le32(size);
+
+       return qcom_scm_call(QCOM_SCM_OCMEM_SVC, QCOM_SCM_OCMEM_UNLOCK_CMD,
+                       &request, sizeof(request), NULL, 0);
+}
+
 bool __qcom_scm_pas_supported(u32 peripheral)
 {
        __le32 out;
diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c
index 7329cf0f..0ca20a3 100644
--- a/drivers/firmware/qcom_scm-64.c
+++ b/drivers/firmware/qcom_scm-64.c
@@ -67,6 +67,17 @@ int __qcom_scm_restore_sec_config(u32 sec_id, u32 
ctx_bank_num)
        return -ENOTSUPP;
 }

+int __qcom_scm_ocmem_lock(uint32_t id, uint32_t offset, uint32_t size,
+               uint32_t mode)
+{
+       return -ENOTSUPP;
+}
+
+int __qcom_scm_ocmem_unlock(uint32_t id, uint32_t offset, uint32_t size)
+{
+       return -ENOTSUPP;
+}
+
 bool __qcom_scm_pas_supported(u32 peripheral)
 {
        return false;
diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
index 8f43c0b..0e7ce42 100644
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -176,6 +176,45 @@ int qcom_scm_restore_sec_config(unsigned sec_id)
 EXPORT_SYMBOL(qcom_scm_restore_sec_config);

 /**
+ * qcom_scm_ocmem_lock_available() - is OCMEM lock/unlock interface available
+ */
+bool qcom_scm_ocmem_lock_available(void)
+{
+       return __qcom_scm_is_call_available(QCOM_SCM_OCMEM_SVC,
+                       QCOM_SCM_OCMEM_LOCK_CMD);
+}
+EXPORT_SYMBOL(qcom_scm_ocmem_lock_available);
+
+/**
+ * qcom_scm_ocmem_lock() - call OCMEM lock interface to assign an OCMEM
+ * region to the specified initiator
+ *
+ * @id:     tz initiator id
+ * @offset: OCMEM offset
+ * @size:   OCMEM size
+ * @mode:   access mode (WIDE/NARROW)
+ */
+int qcom_scm_ocmem_lock(u32 id, u32 offset, u32 size, u32 mode)
+{
+       return __qcom_scm_ocmem_lock(id, offset, size, mode);
+}
+EXPORT_SYMBOL(qcom_scm_ocmem_lock);
+
+/**
+ * qcom_scm_ocmem_unlock() - call OCMEM unlock interface to release an OCMEM
+ * region from the specified initiator
+ *
+ * @id:     tz initiator id
+ * @offset: OCMEM offset
+ * @size:   OCMEM size
+ */
+int qcom_scm_ocmem_unlock(u32 id, u32 offset, u32 size)
+{
+       return __qcom_scm_ocmem_unlock(id, offset, size);
+}
+EXPORT_SYMBOL(qcom_scm_ocmem_unlock);
+
+/**
  * qcom_scm_pas_supported() - Check if the peripheral authentication service is
  *                           available for the given peripherial
  * @peripheral:        peripheral id
diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h
index 3085616..ec3435e 100644
--- a/drivers/firmware/qcom_scm.h
+++ b/drivers/firmware/qcom_scm.h
@@ -41,6 +41,13 @@ extern int __qcom_scm_hdcp_req(struct qcom_scm_hdcp_req 
*req, u32 req_cnt,

 extern int __qcom_scm_restore_sec_config(u32 sec_id, u32 ctx_bank_num);

+#define QCOM_SCM_OCMEM_SVC                     0xf
+#define QCOM_SCM_OCMEM_LOCK_CMD                0x1
+#define QCOM_SCM_OCMEM_UNLOCK_CMD              0x2
+
+extern int __qcom_scm_ocmem_lock(u32 id, u32 offset, u32 size, u32 mode);
+extern int __qcom_scm_ocmem_unlock(u32 id, u32 offset, u32 size);
+
 #define QCOM_SCM_SVC_PIL               0x2
 #define QCOM_SCM_PAS_INIT_IMAGE_CMD    0x1
 #define QCOM_SCM_PAS_MEM_SETUP_CMD     0x2
diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h
index 7be3d91..beadca4 100644
--- a/include/linux/qcom_scm.h
+++ b/include/linux/qcom_scm.h
@@ -35,6 +35,10 @@ extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, 
u32 req_cnt,
 extern bool qcom_scm_restore_sec_config_available(void);
 extern int qcom_scm_restore_sec_config(unsigned sec_id);

+extern bool qcom_scm_ocmem_lock_available(void);
+extern int qcom_scm_ocmem_lock(u32 id, u32 offset, u32 size, u32 mode);
+extern int qcom_scm_ocmem_unlock(u32 id, u32 offset, u32 size);
+
 extern bool qcom_scm_pas_supported(u32 peripheral);
 extern int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, 
size_t size);
 extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, 
phys_addr_t size);
-- 
2.4.3

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