On Wed, Jun 24, 2015 at 3:46 PM, Oded Gabbay <oded.gabbay at gmail.com> wrote: > On Wed, Jun 24, 2015 at 10:06 PM, Alex Deucher <alexdeucher at gmail.com> > wrote: >> On Fri, Jun 12, 2015 at 4:08 AM, Oded Gabbay <oded.gabbay at gmail.com> >> wrote: >>> From: Ben Goz <ben.goz at amd.com> >>> >>> Signed-off-by: Ben Goz <ben.goz at amd.com> >>> Acked-by: Oded Gabbay <oded.gabbay at amd.com> >> >> This patch effectively reverts a fix for a hw bug IIRC. >> >> Alex > Hmm, let's see what Ben says about this. To which H/W bug are you referring ?
Nevermind, it was a tonga bug which is handled by a separate code path. Patch applied. Alex > > Oded >> >>> --- >>> drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c >>> b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c >>> index e4aeb74..7683d7f 100644 >>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c >>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c >>> @@ -3128,7 +3128,7 @@ static int gfx_v8_0_cp_compute_resume(struct >>> amdgpu_device *adev) >>> WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, >>> AMDGPU_DOORBELL_KIQ << 2); >>> WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, >>> - AMDGPU_DOORBELL_MEC_RING7 << 2); >>> + 0x7FFFF << 2); >>> } >>> tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL); >>> tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, >>> -- >>> 2.4.3 >>>
