From: Inki Dae <inki....@samsung.com>
This patch adds MIPI-DSI based S6E63J0X03 AMOLED LCD panel driver
which uses mipi_dsi bus to communicate with panel. The panel has
320Ã320 resolution in 1.63-inch physical panel. This panel is used in
Samsung Galaxy Gear 2.
Signed-off-by: Inki Dae <inki.dae at samsung.com>
Signed-off-by: Hyungwon Hwang <human.hwang at samsung.com>
Acked-by: Kyungmin Park <kyungmin.park at samsung.com>
---
drivers/gpu/drm/exynos/exynos_drm_dsi.c | 31 +++++++++++++++++++------------
drivers/gpu/drm/panel/Kconfig | 6 ++++++
drivers/gpu/drm/panel/Makefile | 1 +
3 files changed, 26 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index 5576cc3..6cb4887 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -743,6 +743,14 @@ static void exynos_dsi_disable_clock(struct exynos_dsi
*dsi)
DSI_WRITE(dsi, DSIM_PLLCTRL_REG, reg);
}
+static void exynos_dsi_enable_lane(struct exynos_dsi *dsi, u32 lane)
+{
+ u32 reg = DSI_READ(dsi, DSIM_CONFIG_REG);
+ reg |= (DSIM_NUM_OF_DATA_LANE(dsi->lanes - 1) | DSIM_LANE_EN_CLK |
+ DSIM_LANE_EN(lane));
+ DSI_WRITE(dsi, DSIM_CONFIG_REG, reg);
+}
+
static int exynos_dsi_init_link(struct exynos_dsi *dsi)
{
struct exynos_dsi_driver_data *driver_data = dsi->driver_data;
@@ -815,17 +823,6 @@ static int exynos_dsi_init_link(struct exynos_dsi *dsi)
return -EINVAL;
}
- reg |= DSIM_NUM_OF_DATA_LANE(dsi->lanes - 1);
-
- DSI_WRITE(dsi, DSIM_CONFIG_REG, reg);
-
- reg |= DSIM_LANE_EN_CLK;
- DSI_WRITE(dsi, DSIM_CONFIG_REG, reg);
-
- lanes_mask = BIT(dsi->lanes) - 1;
- reg |= DSIM_LANE_EN(lanes_mask);
- DSI_WRITE(dsi, DSIM_CONFIG_REG, reg);
-
/*
* Use non-continuous clock mode if the periparal wants and
* host controller supports
@@ -837,8 +834,11 @@ static int exynos_dsi_init_link(struct exynos_dsi *dsi)
if (driver_data->has_clklane_stop &&
dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
reg |= DSIM_CLKLANE_STOP;
- DSI_WRITE(dsi, DSIM_CONFIG_REG, reg);
}
+ DSI_WRITE(dsi, DSIM_CONFIG_REG, reg);
+
+ lanes_mask = BIT(dsi->lanes) - 1;
+ exynos_dsi_enable_lane(dsi, lanes_mask);
/* Check clock and data lane state are stop state */
timeout = 100;
@@ -1301,6 +1301,10 @@ static int exynos_dsi_init(struct exynos_dsi *dsi)
exynos_dsi_reset(dsi);
exynos_dsi_enable_irq(dsi);
+
+ if (driver_data->values[RESET_TYPE] == DSIM_FUNCRST)
+ exynos_dsi_enable_lane(dsi, BIT(dsi->lanes) - 1);
+
exynos_dsi_enable_clock(dsi);
if (driver_data->wait_for_reset)
exynos_dsi_wait_for_reset(dsi);
@@ -1893,6 +1897,9 @@ static int exynos_dsi_probe(struct platform_device *pdev)
dsi->clks = devm_kzalloc(dev,
sizeof(*dsi->clks) * dsi->driver_data->num_clks,
GFP_KERNEL);
+ if (!dsi->clks)
+ goto err_del_component;
+
for (i = 0; i < dsi->driver_data->num_clks; i++) {
dsi->clks[i] = devm_clk_get(dev, clk_names[i]);
if (IS_ERR(dsi->clks[i])) {
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 6d64c7b..cb07bc6 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -43,4 +43,10 @@ config DRM_PANEL_SHARP_LQ101R1SX01
To compile this driver as a module, choose M here: the module
will be called panel-sharp-lq101r1sx01.
+config DRM_PANEL_S6E63J0X03
+ tristate "S6E63J0X03 DSI video mode panel"
+ depends on OF
+ select DRM_MIPI_DSI
+ select VIDEOMODE_HELPERS
+
endmenu
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 4b2a043..27b0a90 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -2,3 +2,4 @@ obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o
obj-$(CONFIG_DRM_PANEL_LD9040) += panel-ld9040.o
obj-$(CONFIG_DRM_PANEL_S6E8AA0) += panel-s6e8aa0.o
obj-$(CONFIG_DRM_PANEL_SHARP_LQ101R1SX01) += panel-sharp-lq101r1sx01.o
+obj-$(CONFIG_DRM_PANEL_S6E63J0X03) += panel-s6e63j0x03.o
--
1.9.1
