On 24.02.2015 01:24, Alex Deucher wrote:
> The atom aux param interface only supports 4 bits for
> the total write transfer size (header + payload). This
> limits us to 12 bytes of payload rather than 16. Add a
> check for this. Reads are not affected.
>
> v2: switch to WARN_ON_ONCE
>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/radeon/atombios_dp.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/radeon/atombios_dp.c
> b/drivers/gpu/drm/radeon/atombios_dp.c
> index 5bf825d..8d74de8 100644
> --- a/drivers/gpu/drm/radeon/atombios_dp.c
> +++ b/drivers/gpu/drm/radeon/atombios_dp.c
> @@ -178,6 +178,13 @@ radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct
> drm_dp_aux_msg *msg)
> switch (msg->request & ~DP_AUX_I2C_MOT) {
> case DP_AUX_NATIVE_WRITE:
> case DP_AUX_I2C_WRITE:
> + /* The atom implementation only supports writes with a max
> payload of
> + * 12 bytes since it uses 4 bits for the total count (header +
> payload)
> + * in the parameter space. The atom interface supports 16 byte
> + * payloads for reads. The hw itself supports up to 16 bytes of
> payload.
> + */
> + if (WARN_ON_ONCE(msg->size > 12))
> + return -E2BIG;
> /* tx_size needs to be 4 even for bare address packets since
> the atom
> * table needs the info in tx_buf[3].
> */
>
Reviewed-by: Michel Dänzer <michel.daenzer at amd.com>
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
