On Mon, Dec 14, 2015 at 01:55:55PM +0100, Thierry Reding wrote: > From: Thierry Reding <treding at nvidia.com> > > Rather than storing capabilities as flags in an integer, use a separate > boolean per capability. This simplifies the code that checks for these > capabilities. > > Cc: Rob Clark <robdclark at gmail.com> > Signed-off-by: Thierry Reding <treding at nvidia.com>
I still don't really see all that much benefit in storing this in decoded form, but explicit bools instead of creating a new bitfiled with new DP_* #defines that look awfully close to the spec ones but arent is much better. This way there's at least no confusion. Besides that bikeshed I think this patch series looks like a good step towards unifying our dp helpers again overall. Tow comments below, otherwise Ack on the approach from my side. Didn't do a detailed review though. > --- > drivers/gpu/drm/drm_dp_helper.c | 18 +++++++++++++++--- > drivers/gpu/drm/msm/edp/edp_ctrl.c | 4 ++-- > drivers/gpu/drm/tegra/sor.c | 4 ++-- > include/drm/drm_dp_helper.h | 10 ++++++++-- > 4 files changed, 27 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c > index c00896ab8b04..cdc0da67e8ad 100644 > --- a/drivers/gpu/drm/drm_dp_helper.c > +++ b/drivers/gpu/drm/drm_dp_helper.c > @@ -284,6 +284,17 @@ int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux, > } > EXPORT_SYMBOL(drm_dp_dpcd_read_link_status); > > +static void drm_dp_link_caps_reset(struct drm_dp_link_caps *caps) > +{ > + caps->enhanced_framing = false; memset imo. > +} > + > +void drm_dp_link_caps_copy(struct drm_dp_link_caps *dest, > + const struct drm_dp_link_caps *src) > +{ > + dest->enhanced_framing = src->enhanced_framing; memcpy imo. -Daniel > +} > + > static void drm_dp_link_reset(struct drm_dp_link *link) > { > if (!link) > @@ -292,7 +303,8 @@ static void drm_dp_link_reset(struct drm_dp_link *link) > link->revision = 0; > link->max_rate = 0; > link->max_lanes = 0; > - link->capabilities = 0; > + > + drm_dp_link_caps_reset(&link->caps); > > link->rate = 0; > link->lanes = 0; > @@ -325,7 +337,7 @@ int drm_dp_link_probe(struct drm_dp_aux *aux, struct > drm_dp_link *link) > link->max_lanes = values[2] & DP_MAX_LANE_COUNT_MASK; > > if (values[2] & DP_ENHANCED_FRAME_CAP) > - link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING; > + link->caps.enhanced_framing = true; > > link->rate = link->max_rate; > link->lanes = link->max_lanes; > @@ -418,7 +430,7 @@ int drm_dp_link_configure(struct drm_dp_aux *aux, struct > drm_dp_link *link) > values[0] = drm_dp_link_rate_to_bw_code(link->rate); > values[1] = link->lanes; > > - if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING) > + if (link->caps.enhanced_framing) > values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN; > > err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values)); > diff --git a/drivers/gpu/drm/msm/edp/edp_ctrl.c > b/drivers/gpu/drm/msm/edp/edp_ctrl.c > index c87a03561246..12e2a5cd9582 100644 > --- a/drivers/gpu/drm/msm/edp/edp_ctrl.c > +++ b/drivers/gpu/drm/msm/edp/edp_ctrl.c > @@ -452,7 +452,7 @@ static void edp_config_ctrl(struct edp_ctrl *ctrl) > > data = EDP_CONFIGURATION_CTRL_LANES(ctrl->lane_cnt - 1); > > - if (ctrl->dp_link.capabilities & DP_LINK_CAP_ENHANCED_FRAMING) > + if (ctrl->dp_link.caps.enhanced_framing) > data |= EDP_CONFIGURATION_CTRL_ENHANCED_FRAMING; > > depth = EDP_6BIT; > @@ -774,7 +774,7 @@ static int edp_do_link_train(struct edp_ctrl *ctrl) > */ > dp_link.lanes = ctrl->lane_cnt; > dp_link.rate = drm_dp_bw_code_to_link_rate(ctrl->link_rate); > - dp_link.capabilities = ctrl->dp_link.capabilities; > + drm_dp_link_caps_copy(&dp_link.caps, &ctrl->dp_link.caps); > if (drm_dp_link_configure(ctrl->drm_aux, &dp_link) < 0) > return EDP_TRAIN_FAIL; > > diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c > index 7bf444bd1588..f26dfaca7586 100644 > --- a/drivers/gpu/drm/tegra/sor.c > +++ b/drivers/gpu/drm/tegra/sor.c > @@ -645,7 +645,7 @@ static int tegra_sor_calc_config(struct tegra_sor *sor, > num = ((mode->htotal - mode->hdisplay) - 7) * link_rate; > config->hblank_symbols = div_u64(num, pclk); > > - if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING) > + if (link->caps.enhanced_framing) > config->hblank_symbols -= 3; > > config->hblank_symbols -= 12 / link->lanes; > @@ -1464,7 +1464,7 @@ static void tegra_sor_edp_enable(struct drm_encoder > *encoder) > value &= ~SOR_DP_LINKCTL_LANE_COUNT_MASK; > value |= SOR_DP_LINKCTL_LANE_COUNT(lanes); > > - if (link.capabilities & DP_LINK_CAP_ENHANCED_FRAMING) > + if (link.caps.enhanced_framing) > value |= SOR_DP_LINKCTL_ENHANCED_FRAME; > > tegra_sor_writel(sor, value, SOR_DP_LINKCTL0); > diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h > index 124fea3ffd57..20e4fe2e13c5 100644 > --- a/include/drm/drm_dp_helper.h > +++ b/include/drm/drm_dp_helper.h > @@ -753,13 +753,19 @@ int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux, > /* > * DisplayPort link > */ > -#define DP_LINK_CAP_ENHANCED_FRAMING (1 << 0) > +struct drm_dp_link_caps { > + bool enhanced_framing; > +}; > + > +void drm_dp_link_caps_copy(struct drm_dp_link_caps *dest, > + const struct drm_dp_link_caps *src); > > struct drm_dp_link { > unsigned char revision; > unsigned int max_rate; > unsigned int max_lanes; > - unsigned long capabilities; > + > + struct drm_dp_link_caps caps; > > unsigned int rate; > unsigned int lanes; > -- > 2.5.0 > > _______________________________________________ > dri-devel mailing list > dri-devel at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/dri-devel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch