Hi,

I'm having issues with non-functional DSI output driving a 2-lane panel 
connected to DSI0 on MSM8x74 MDP5 v1.2 hardware. The code in 
drivers/gpu/drm/msm/dsi/dsi_host.c around line 703 enables lane 1 and 2 instead 
of lane 0 and 1 for performance reasons (and then enables lane swapping in the 
DSI PHY (LANE_SWAP_1230)). I cannot get this to work on the MSM8x74, no data 
observed on physical lane 0 (can't access lane1 easily unfortunately). 
Disabling this swap and enabling lane0 and 1 instead results in a fully 
functional panel.

Would it make sense to make this performance optimization a compile-time option 
that defaults to off (for certain problematic hardware or in general)?

/wj

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