On 14.08.2015 20:08, Bas Nieuwenhuizen wrote:
> Pagetables can be moved and therefore the page directory update can be
> necessary
> for the current cs even if none of the the bo's are moved. In that scenario
> there is no fence between the sdma0 and gfx ring, so we add one.
>
> Signed-off-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Nice catch, this patch is Reviewed-by: Christian König
<christian.koenig at amd.com>
The other one we found internally already as well.
Regards,
Christian.
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 4 ++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 6 ++++++
> 3 files changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 6934f52..c2383bb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -981,6 +981,7 @@ struct amdgpu_vm {
> /* contains the page directory */
> struct amdgpu_bo *page_directory;
> unsigned max_pde_used;
> + struct fence *page_directory_fence;
>
> /* array of page tables, one for each page directory entry */
> struct amdgpu_vm_pt *page_tables;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> index f428288..01b4a67 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> @@ -552,6 +552,10 @@ static int amdgpu_bo_vm_update_pte(struct
> amdgpu_cs_parser *p,
> if (r)
> return r;
>
> + r = amdgpu_sync_fence(adev, &p->ibs[0].sync, vm->page_directory_fence);
> + if (r)
> + return r;
> +
> r = amdgpu_vm_clear_freed(adev, vm);
> if (r)
> return r;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index b3f5d04..e02e353 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -495,6 +495,9 @@ int amdgpu_vm_update_page_directory(struct amdgpu_device
> *adev,
> if (r)
> goto error_free;
> amdgpu_bo_fence(pd, fence, true);
> +
> + fence_put(vm->page_directory_fence);
> + vm->page_directory_fence = fence_get(fence);
> }
>
> if (!amdgpu_enable_scheduler || ib->length_dw == 0) {
> @@ -1287,6 +1290,8 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct
> amdgpu_vm *vm)
> return -ENOMEM;
> }
>
> + vm->page_directory_fence = NULL;
> +
> r = amdgpu_bo_create(adev, pd_size, align, true,
> AMDGPU_GEM_DOMAIN_VRAM, 0,
> NULL, &vm->page_directory);
> @@ -1335,6 +1340,7 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct
> amdgpu_vm *vm)
> kfree(vm->page_tables);
>
> amdgpu_bo_unref(&vm->page_directory);
> + fence_put(vm->page_directory_fence);
>
> for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
> amdgpu_fence_unref(&vm->ids[i].flushed_updates);
