According to TRM, DSI_NUM_DATA_LANES only applies for HS
transactions, so set it to the proper number of lanes.

Signed-off-by: Sean Paul <seanpaul at chromium.org>
---
 drivers/gpu/drm/tegra/dsi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
index ed970f6..09f9f68 100644
--- a/drivers/gpu/drm/tegra/dsi.c
+++ b/drivers/gpu/drm/tegra/dsi.c
@@ -1287,7 +1287,7 @@ static ssize_t tegra_dsi_host_transfer(struct 
mipi_dsi_host *host,
                tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL);
        }

-       value = DSI_CONTROL_LANES(0) | DSI_CONTROL_HOST_ENABLE;
+       value = DSI_CONTROL_LANES(dsi->lanes - 1) | DSI_CONTROL_HOST_ENABLE;
        tegra_dsi_writel(dsi, value, DSI_CONTROL);

        /* write packet header, ECC is generated by hardware */
-- 
2.5.0.rc2.392.g76e840b

Reply via email to