On Thu, Mar 13, 2014 at 10:49 PM, Arthur Borsboom
<arthurborsboom at gmail.com> wrote:
> Cleanup of code by following i915 constant/variable names and ordering
> Cleanup of code by following directions from kernel documentation: Codingstyle
> Cleanup of code by following directions from kernel documentation: DRM
~72 col lines are preferred for commit messages. It makes git log look better.
Run "git log" and you'll see when it's ok to make exceptions.
>
> Signed-off-by: Arthur Borsboom <arthurborsboom at gmail.com>
> ---
> drivers/gpu/drm/gma500/psb_drv.c | 132
> +++++++++++++++++++--------------------
> drivers/gpu/drm/gma500/psb_drv.h | 39 ++++--------
> 2 files changed, 77 insertions(+), 94 deletions(-)
>
> diff --git a/drivers/gpu/drm/gma500/psb_drv.c
> b/drivers/gpu/drm/gma500/psb_drv.c
> index 5c6cdd0..ae95e31 100644
> --- a/drivers/gpu/drm/gma500/psb_drv.c
> +++ b/drivers/gpu/drm/gma500/psb_drv.c
> @@ -37,9 +37,11 @@
> #include <acpi/video.h>
> #include <linux/module.h>
>
> +static struct drm_driver driver;
> +
> static int drm_psb_trap_pagefaults;
>
> -static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
> +static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id
> *ent);
>
> MODULE_PARM_DESC(trap_pagefaults, "Error and reset on MMU pagefaults");
> module_param_named(trap_pagefaults, drm_psb_trap_pagefaults, int, 0600);
> @@ -62,44 +64,43 @@ static DEFINE_PCI_DEVICE_TABLE(pciidlist) = {
> { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops
> },
> { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops
> },
> #if defined(CONFIG_DRM_GMA600)
> - { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops},
> - { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops},
> - { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops},
> - { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops},
> - { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops},
> - { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops},
> - { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops},
> - { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops},
> - /* Atom E620 */
> - { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops},
> + { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops },
> + { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops },
> + { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops },
> + { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops },
> + { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops },
> + { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops },
> + { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops },
> + { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops },
> + { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &oaktrail_chip_ops },
> #endif
> #if defined(CONFIG_DRM_MEDFIELD)
> - {0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops},
> - {0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops},
> - {0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops},
> - {0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops},
> - {0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops},
> - {0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops},
> - {0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops},
> - {0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops},
> + { 0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops },
> + { 0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops },
> + { 0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops },
> + { 0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops },
> + { 0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops },
> + { 0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops },
> + { 0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops },
> + { 0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long)
> &mdfld_chip_ops },
> #endif
> #if defined(CONFIG_DRM_GMA3600)
> - { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> - { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> - { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> - { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> - { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> - { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> - { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> - { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> - { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> - { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> - { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> - { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> - { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> - { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> - { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> - { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
> + { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops
> },
> + { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops
> },
> + { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops
> },
> + { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops
> },
> + { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops
> },
> + { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops
> },
> + { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops
> },
> + { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops
> },
> + { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops
> },
> + { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops
> },
> + { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops
> },
> + { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops
> },
> + { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops
> },
> + { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops
> },
> + { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops
> },
> + { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops
> },
> #endif
> { 0, }
> };
> @@ -108,7 +109,6 @@ MODULE_DEVICE_TABLE(pci, pciidlist);
> /*
> * Standard IOCTLs.
> */
> -
> #define DRM_IOCTL_GMA_ADB \
> DRM_IOWR(DRM_GMA_ADB + DRM_COMMAND_BASE, uint32_t)
> #define DRM_IOCTL_GMA_MODE_OPERATION \
> @@ -160,7 +160,7 @@ static const struct drm_ioctl_desc psb_ioctls[] = {
> DRM_UNLOCKED | DRM_AUTH),
> };
>
> -static void psb_lastclose(struct drm_device *dev)
> +static void psb_driver_lastclose(struct drm_device *dev)
> {
> int ret;
> struct drm_psb_private *dev_priv = dev->dev_private;
> @@ -190,11 +190,9 @@ static int psb_do_init(struct drm_device *dev)
> goto out_err;
> }
>
> -
> stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
> stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
> - stolen_gtt =
> - (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
> + stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt :
> pg->gtt_pages;
>
> dev_priv->gatt_free_offset = pg->mmu_gatt_start +
> (stolen_gtt << PAGE_SHIFT) * 1024;
> @@ -296,7 +294,7 @@ static int psb_driver_unload(struct drm_device *dev)
> * - mode setting
> * - set inital output configuration
> */
> -static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
> +static int psb_driver_load(struct drm_device *dev, unsigned long flags)
> {
> struct drm_psb_private *dev_priv;
> unsigned long resource_start, resource_len;
> @@ -310,7 +308,7 @@ static int psb_driver_load(struct drm_device *dev,
> unsigned long chipset)
> if (dev_priv == NULL)
> return -ENOMEM;
>
> - dev_priv->ops = (struct psb_ops *)chipset;
> + dev_priv->ops = (struct psb_ops *)flags;
> dev_priv->dev = dev;
> dev->dev_private = (void *) dev_priv;
>
> @@ -421,9 +419,7 @@ static int psb_driver_load(struct drm_device *dev,
> unsigned long chipset)
> drm_irq_install(dev);
>
> dev->vblank_disable_allowed = true;
> -
> dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
> -
> dev->driver->get_vblank_counter = psb_get_vblank_counter;
>
> psb_modeset_init(dev);
> @@ -624,7 +620,7 @@ static int psb_driver_open(struct drm_device *dev, struct
> drm_file *priv)
> return 0;
> }
>
> -static void psb_driver_close(struct drm_device *dev, struct drm_file *priv)
> +static void psb_driver_postclose(struct drm_device *dev, struct drm_file
> *priv)
> {
> }
>
> @@ -653,7 +649,13 @@ static void psb_driver_preclose(struct drm_device *dev,
> struct drm_file *priv)
> {
> }
>
> -static void psb_remove(struct pci_dev *pdev)
> +static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id
> *ent)
> +{
> + return drm_get_pci_dev(pdev, ent, &driver);
> +}
> +
> +
> +static void psb_pci_remove(struct pci_dev *pdev)
> {
> struct drm_device *dev = pci_get_drvdata(pdev);
> drm_put_dev(dev);
> @@ -695,11 +697,14 @@ static const struct file_operations psb_gem_fops = {
> */
> static struct drm_driver driver = {
> .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | \
> - DRIVER_MODESET | DRIVER_GEM ,
> + DRIVER_MODESET | DRIVER_GEM,
> .load = psb_driver_load,
> .unload = psb_driver_unload,
> + .open = psb_driver_open,
> + .lastclose = psb_driver_lastclose,
> + .preclose = psb_driver_preclose,
> + .postclose = psb_driver_postclose,
>
> - .ioctls = psb_ioctls,
> .num_ioctls = DRM_ARRAY_SIZE(psb_ioctls),
> .device_is_agp = psb_driver_device_is_agp,
> .irq_preinstall = psb_irq_preinstall,
> @@ -709,40 +714,31 @@ static struct drm_driver driver = {
> .enable_vblank = psb_enable_vblank,
> .disable_vblank = psb_disable_vblank,
> .get_vblank_counter = psb_get_vblank_counter,
> - .lastclose = psb_lastclose,
> - .open = psb_driver_open,
> - .preclose = psb_driver_preclose,
> - .postclose = psb_driver_close,
>
> .gem_free_object = psb_gem_free_object,
> .gem_vm_ops = &psb_gem_vm_ops,
> +
> .dumb_create = psb_gem_dumb_create,
> .dumb_map_offset = psb_gem_dumb_map_gtt,
> .dumb_destroy = drm_gem_dumb_destroy,
> + .ioctls = psb_ioctls,
> .fops = &psb_gem_fops,
> .name = DRIVER_NAME,
> .desc = DRIVER_DESC,
> - .date = PSB_DRM_DRIVER_DATE,
> - .major = PSB_DRM_DRIVER_MAJOR,
> - .minor = PSB_DRM_DRIVER_MINOR,
> - .patchlevel = PSB_DRM_DRIVER_PATCHLEVEL
> + .date = DRIVER_DATE,
> + .major = DRIVER_MAJOR,
> + .minor = DRIVER_MINOR,
> + .patchlevel = DRIVER_PATCHLEVEL
> };
>
> static struct pci_driver psb_pci_driver = {
> .name = DRIVER_NAME,
> .id_table = pciidlist,
> - .probe = psb_probe,
> - .remove = psb_remove,
> - .driver = {
> - .pm = &psb_pm_ops,
> - }
> + .probe = psb_pci_probe,
> + .remove = psb_pci_remove,
> + .driver.pm = &psb_pm_ops,
> };
>
> -static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
> -{
> - return drm_get_pci_dev(pdev, ent, &driver);
> -}
> -
> static int __init psb_init(void)
> {
> return drm_pci_init(&driver, &psb_pci_driver);
> @@ -756,6 +752,6 @@ static void __exit psb_exit(void)
> late_initcall(psb_init);
> module_exit(psb_exit);
>
> -MODULE_AUTHOR("Alan Cox <alan at linux.intel.com> and others");
> +MODULE_AUTHOR(DRIVER_AUTHOR);
> MODULE_DESCRIPTION(DRIVER_DESC);
> -MODULE_LICENSE("GPL");
> +MODULE_LICENSE(DRIVER_LICENSE);
> diff --git a/drivers/gpu/drm/gma500/psb_drv.h
> b/drivers/gpu/drm/gma500/psb_drv.h
> index 85c560e..150d9b5 100644
> --- a/drivers/gpu/drm/gma500/psb_drv.h
> +++ b/drivers/gpu/drm/gma500/psb_drv.h
> @@ -37,6 +37,12 @@
> /*
> * Driver definitions
> */
> +#define DRIVER_AUTHOR "Alan Cox <alan at linux.intel.com> and others"
> +#define DRIVER_LICENSE "GPL"
> +
> +#define DRIVER_NAME "gma500"
> +#define DRIVER_DESC "DRM driver for the Intel GMA500, GMA600, GMA3600,
> GMA3650"
> +#define DRIVER_DATE "20140312"
>
> /*
> * Driver history (deprecated)
> @@ -46,6 +52,9 @@
> *
> * TODO: describe better ways
> */
> +#define DRIVER_MAJOR 1
> +#define DRIVER_MINOR 0
> +#define DRIVER_PATCHLEVEL 0
>
> /* Append new drm mode definition here, align with libdrm definition */
> #define DRM_MODE_SCALE_NO_SCALE 2
> @@ -63,18 +72,6 @@ enum {
> #define IS_CDV(dev) (((dev)->pdev->device & 0xfff0) == 0x0be0)
>
> /*
> - * Driver definitions
> - */
> -
> -#define DRIVER_NAME "gma500"
> -#define DRIVER_DESC "DRM driver for the Intel GMA500"
> -
> -#define PSB_DRM_DRIVER_DATE "2011-06-06"
> -#define PSB_DRM_DRIVER_MAJOR 1
> -#define PSB_DRM_DRIVER_MINOR 0
> -#define PSB_DRM_DRIVER_PATCHLEVEL 0
> -
> -/*
> * Hardware offsets
> */
> #define PSB_VDC_OFFSET 0x00000000
> @@ -84,6 +81,7 @@ enum {
> #define PSB_SGX_SIZE 0x8000
> #define PSB_SGX_OFFSET 0x00040000
> #define MRST_SGX_OFFSET 0x00080000
> +
> /*
> * PCI resource identifiers
> */
> @@ -91,6 +89,7 @@ enum {
> #define PSB_AUX_RESOURCE 0
> #define PSB_GATT_RESOURCE 2
> #define PSB_GTT_RESOURCE 3
> +
> /*
> * PCI configuration
> */
> @@ -111,12 +110,14 @@ enum {
> #define PSB_MMU_CACHED_MEMORY 0x0001 /* Bind to MMU only */
> #define PSB_MMU_RO_MEMORY 0x0002 /* MMU RO memory */
> #define PSB_MMU_WO_MEMORY 0x0004 /* MMU WO memory */
> +
> /*
> * PTE's and PDE's
> */
> #define PSB_PDE_MASK 0x003FFFFF
> #define PSB_PDE_SHIFT 22
> #define PSB_PTE_SHIFT 12
> +
> /*
> * Cache control
> */
> @@ -295,7 +296,6 @@ struct intel_gmbus {
> /*
> * Register offset maps
> */
> -
> struct psb_offset {
> u32 fp0;
> u32 fp1;
> @@ -494,7 +494,6 @@ struct drm_psb_private {
> /*
> * Register base
> */
> -
> uint8_t __iomem *sgx_reg;
> uint8_t __iomem *vdc_reg;
> uint8_t __iomem *aux_reg; /* Auxillary vdc pipe regs */
> @@ -503,7 +502,6 @@ struct drm_psb_private {
> /*
> * Fencing / irq.
> */
> -
> uint32_t vdc_irq_mask;
> uint32_t pipestat[PSB_NUM_PIPE];
>
> @@ -512,7 +510,6 @@ struct drm_psb_private {
> /*
> * Power
> */
> -
> bool suspended;
> bool display_power;
> int display_count;
> @@ -535,7 +532,6 @@ struct drm_psb_private {
> /*
> * Sizes info
> */
> -
> u32 fuse_reg_value;
> u32 video_device_fuse;
>
> @@ -594,7 +590,6 @@ struct drm_psb_private {
> /*
> * Register state
> */
> -
> struct psb_save_area regs;
>
> /* MSI reg save */
> @@ -604,7 +599,6 @@ struct drm_psb_private {
> /*
> * Hotplug handling
> */
> -
> struct work_struct hotplug_work;
>
> /*
> @@ -618,7 +612,6 @@ struct drm_psb_private {
> /*
> * Watchdog
> */
> -
> uint32_t apm_reg;
> uint16_t apm_base;
>
> @@ -676,7 +669,6 @@ struct drm_psb_private {
> /*
> * Operations for each board type
> */
> -
> struct psb_ops {
> const char *name;
> unsigned int accel_2d:1;
> @@ -735,7 +727,6 @@ static inline struct drm_psb_private *psb_priv(struct
> drm_device *dev)
> /*
> * MMU stuff.
> */
> -
> extern struct psb_mmu_driver *psb_mmu_driver_init(uint8_t __iomem *
> registers,
> int trap_pagefaults,
> int invalid_type,
> @@ -763,8 +754,6 @@ extern int psb_mmu_virtual_to_pfn(struct psb_mmu_pd *pd,
> uint32_t virtual,
> /*
> * Enable / disable MMU for different requestors.
> */
> -
> -
> extern void psb_mmu_set_pd_context(struct psb_mmu_pd *pd, int hw_context);
> extern int psb_mmu_insert_pages(struct psb_mmu_pd *pd, struct page **pages,
> unsigned long address, uint32_t num_pages,
> @@ -816,7 +805,6 @@ extern void psb_spank(struct drm_psb_private *dev_priv);
> /*
> * psb_reset.c
> */
> -
> extern void psb_lid_timer_init(struct drm_psb_private *dev_priv);
> extern void psb_lid_timer_takedown(struct drm_psb_private *dev_priv);
> extern void psb_print_pagefault(struct drm_psb_private *dev_priv);
> @@ -896,7 +884,6 @@ extern int drm_idle_check_interval;
> /*
> * Utilities
> */
> -
> static inline u32 MRST_MSG_READ32(uint port, uint offset)
> {
> int mcr = (0xD0<<24) | (port << 16) | (offset << 8);
> --
> 1.9.0
>
