Add sysreg phandle to FIMD node so that we are able
to control DISP1BLK configuration in FIMD driver.

Signed-off-by: Ajay Kumar <ajaykumar.rs at samsung.com>
---
 arch/arm/boot/dts/exynos5420.dtsi |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index e385322..4be3090 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -521,6 +521,7 @@
                samsung,power-domain = <&disp_pd>;
                clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
                clock-names = "sclk_fimd", "fimd";
+               samsung,sysreg-phandle = <&sysreg_system_controller>;
        };

        adc: adc at 12D10000 {
-- 
1.7.9.5

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