From: Christian K?nig <christian.koe...@amd.com>

Signed-off-by: Christian K?nig <christian.koenig at amd.com>
---
 drivers/gpu/drm/radeon/cik.c           |  2 +-
 drivers/gpu/drm/radeon/ni.c            |  3 ++-
 drivers/gpu/drm/radeon/radeon.h        |  2 +-
 drivers/gpu/drm/radeon/radeon_device.c | 27 +++++++++++++++++++++------
 drivers/gpu/drm/radeon/radeon_drv.c    |  4 ++++
 drivers/gpu/drm/radeon/radeon_vm.c     |  6 +++---
 drivers/gpu/drm/radeon/si.c            |  2 +-
 7 files changed, 33 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 69a00d6..be464d0 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -5431,7 +5431,7 @@ static int cik_pcie_gart_enable(struct radeon_device 
*rdev)
         */
        /* set vm size, must be a multiple of 4 */
        WREG32(VM_CONTEXT1_PAGE_TABLE_START_ADDR, 0);
-       WREG32(VM_CONTEXT1_PAGE_TABLE_END_ADDR, rdev->vm_manager.max_pfn);
+       WREG32(VM_CONTEXT1_PAGE_TABLE_END_ADDR, radeon_vm_size << 8);
        for (i = 1; i < 16; i++) {
                if (i < 8)
                        WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2),
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 1d3209f..ff7cbbc 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1258,7 +1258,8 @@ static int cayman_pcie_gart_enable(struct radeon_device 
*rdev)
         */
        for (i = 1; i < 8; i++) {
                WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR + (i << 2), 0);
-               WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR + (i << 2), 
rdev->vm_manager.max_pfn);
+               WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR + (i << 2),
+                      radeon_vm_size << 8);
                WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2),
                        rdev->gart.table_addr >> 12);
        }
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index babb7f1..3d8b4fd 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -100,6 +100,7 @@ extern int radeon_dpm;
 extern int radeon_aspm;
 extern int radeon_runtime_pm;
 extern int radeon_hard_reset;
+extern int radeon_vm_size;

 /*
  * Copy from radeon_drv.h so we don't have to include both and have conflicting
@@ -893,7 +894,6 @@ struct radeon_vm {

 struct radeon_vm_manager {
        struct radeon_fence             *active[RADEON_NUM_VM];
-       uint32_t                        max_pfn;
        /* number of VMIDs */
        unsigned                        nvm;
        /* vram base address for page table entry  */
diff --git a/drivers/gpu/drm/radeon/radeon_device.c 
b/drivers/gpu/drm/radeon/radeon_device.c
index 26e1882..83032a6 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -1052,6 +1052,27 @@ static void radeon_check_arguments(struct radeon_device 
*rdev)
                radeon_agpmode = 0;
                break;
        }
+
+       if (!radeon_check_pot_argument(radeon_vm_size)) {
+               dev_warn(rdev->dev, "VM size (%d) must be a power of 2\n",
+                        radeon_vm_size);
+               radeon_vm_size = 4096;
+       }
+
+       if (radeon_vm_size < 4) {
+               dev_warn(rdev->dev, "VM size (%d) to small, min is 4MB\n",
+                        radeon_vm_size);
+               radeon_vm_size = 4096;
+       }
+
+       /*
+        * Max GPUVM size for Cayman, SI and NI are 40 bits.
+        */
+       if (radeon_vm_size > 1024*1024) {
+               dev_warn(rdev->dev, "VM size (%d) to large, max is 1TB\n",
+                        radeon_vm_size);
+               radeon_vm_size = 4096;
+       }
 }

 /**
@@ -1197,12 +1218,6 @@ int radeon_device_init(struct radeon_device *rdev,
        if (r)
                return r;

-       /* Adjust VM size here.
-        * Currently set to 4GB ((1 << 20) 4k pages).
-        * Max GPUVM size for cayman and SI is 40 bits.
-        */
-       rdev->vm_manager.max_pfn = 1 << 20;
-
        /* Set asic functions */
        r = radeon_asic_init(rdev);
        if (r)
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c 
b/drivers/gpu/drm/radeon/radeon_drv.c
index 15447a41..a09426c 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -172,6 +172,7 @@ int radeon_dpm = -1;
 int radeon_aspm = -1;
 int radeon_runtime_pm = -1;
 int radeon_hard_reset = 0;
+int radeon_vm_size = 4096;

 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
 module_param_named(no_wb, radeon_no_wb, int, 0444);
@@ -239,6 +240,9 @@ module_param_named(runpm, radeon_runtime_pm, int, 0444);
 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable 
(default))");
 module_param_named(hard_reset, radeon_hard_reset, int, 0444);

+MODULE_PARM_DESC(vm_size, "VM address space size in megabytes (default 4GB)");
+module_param_named(vm_size, radeon_vm_size, int, 0444);
+
 static struct pci_device_id pciidlist[] = {
        radeon_PCI_IDS
 };
diff --git a/drivers/gpu/drm/radeon/radeon_vm.c 
b/drivers/gpu/drm/radeon/radeon_vm.c
index d3c9161..0b1055e 100644
--- a/drivers/gpu/drm/radeon/radeon_vm.c
+++ b/drivers/gpu/drm/radeon/radeon_vm.c
@@ -59,7 +59,7 @@
  */
 static unsigned radeon_vm_num_pdes(struct radeon_device *rdev)
 {
-       return rdev->vm_manager.max_pfn >> RADEON_VM_BLOCK_SIZE;
+       return (radeon_vm_size << 8) >> RADEON_VM_BLOCK_SIZE;
 }

 /**
@@ -433,9 +433,9 @@ int radeon_vm_bo_set_addr(struct radeon_device *rdev,
                }

                last_pfn = eoffset / RADEON_GPU_PAGE_SIZE;
-               if (last_pfn > rdev->vm_manager.max_pfn) {
+               if (last_pfn > (radeon_vm_size << 8)) {
                        dev_err(rdev->dev, "va above limit (0x%08X > 0x%08X)\n",
-                               last_pfn, rdev->vm_manager.max_pfn);
+                               last_pfn, (radeon_vm_size << 8));
                        return -EINVAL;
                }

diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index d64ef91..afa2a9b 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -4076,7 +4076,7 @@ static int si_pcie_gart_enable(struct radeon_device *rdev)
        /* empty context1-15 */
        /* set vm size, must be a multiple of 4 */
        WREG32(VM_CONTEXT1_PAGE_TABLE_START_ADDR, 0);
-       WREG32(VM_CONTEXT1_PAGE_TABLE_END_ADDR, rdev->vm_manager.max_pfn);
+       WREG32(VM_CONTEXT1_PAGE_TABLE_END_ADDR, radeon_vm_size << 8);
        /* Assign the pt base to something valid for now; the pts used for
         * the VMs are determined by the application and setup and assigned
         * on the fly in the vm part of radeon_gart.c
-- 
1.9.1

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