Am 25.07.2014 um 23:44 schrieb Alex Deucher:
> Older firmware didn't support the new nop packet.
>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>

Reviewed-by: Christian K?nig <christian.koenig at amd.com>

> ---
>   drivers/gpu/drm/radeon/cik.c | 16 +++++++++++++---
>   1 file changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
> index 44d25da..80a7ce0 100644
> --- a/drivers/gpu/drm/radeon/cik.c
> +++ b/drivers/gpu/drm/radeon/cik.c
> @@ -8259,6 +8259,7 @@ restart_ih:
>   static int cik_startup(struct radeon_device *rdev)
>   {
>       struct radeon_ring *ring;
> +     u32 nop;
>       int r;
>   
>       /* enable pcie gen2/3 link */
> @@ -8392,9 +8393,18 @@ static int cik_startup(struct radeon_device *rdev)
>       }
>       cik_irq_set(rdev);
>   
> +     if (rdev->family == CHIP_HAWAII) {
> +             if (rdev->new_fw)
> +                     nop = PACKET3(PACKET3_NOP, 0x3FFF);
> +             else
> +                     nop = RADEON_CP_PACKET2;
> +     } else {
> +             nop = PACKET3(PACKET3_NOP, 0x3FFF);
> +     }
> +
>       ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
>       r = radeon_ring_init(rdev, ring, ring->ring_size, 
> RADEON_WB_CP_RPTR_OFFSET,
> -                          PACKET3(PACKET3_NOP, 0x3FFF));
> +                          nop);
>       if (r)
>               return r;
>   
> @@ -8402,7 +8412,7 @@ static int cik_startup(struct radeon_device *rdev)
>       /* type-2 packets are deprecated on MEC, use type-3 instead */
>       ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX];
>       r = radeon_ring_init(rdev, ring, ring->ring_size, 
> RADEON_WB_CP1_RPTR_OFFSET,
> -                          PACKET3(PACKET3_NOP, 0x3FFF));
> +                          nop);
>       if (r)
>               return r;
>       ring->me = 1; /* first MEC */
> @@ -8413,7 +8423,7 @@ static int cik_startup(struct radeon_device *rdev)
>       /* type-2 packets are deprecated on MEC, use type-3 instead */
>       ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX];
>       r = radeon_ring_init(rdev, ring, ring->ring_size, 
> RADEON_WB_CP2_RPTR_OFFSET,
> -                          PACKET3(PACKET3_NOP, 0x3FFF));
> +                          nop);
>       if (r)
>               return r;
>       /* dGPU only have 1 MEC */

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