On 08.09.2017 09:53, Erik Christiansen wrote:
No, one of the variety of CPUs implemented on FPGAs, so not so curious at all. Some FPGAs contain RAM areas, improving the gate efficiency of e.g. a CPU implementation.
No, that's just boring ;-) I'm thinking of generating VHDL from fw rules and synthesize that into an FPGA. OTOH, for such applications we could also think about different computer architectures (maybe transputers, etc) -- mit freundlichen Grüßen -- Enrico, Sohn von Wilfried, a.d.F. Weigelt, metux IT consulting +49-151-27565287 _______________________________________________ Dng mailing list Dng@lists.dyne.org https://mailinglists.dyne.org/cgi-bin/mailman/listinfo/dng
