John, have you tried building a "vanilla" RFNoC image? That might help narrow things down. Run 'make X310_RFNOC_HG' from your usrp3/top/x300 directory (after loading the environment, which uhd_image_builder does for you).
-- M On Tue, Feb 19, 2019 at 1:49 PM John_w_g <john_...@protonmail.com> wrote: > I am going through the *Getting Started with RFNOC *guide and the > following command fails > > $ ./uhd_image_builder.py window fft -d x310 -t X310_RFNOC_HG -m 5 > --fill-with-fifos > > I have installed a licensed version of Vivado 2017.4 > > When I run the above command the output is: > > --Using the following blocks to generate image: > * window > * fft > Adding CE instantiation file for 'X310_RFNOC_HG' > changing temporarily working directory to > /home/mpnta-rx/rfnoc/src/uhd-fpga/usrp3/tools/scripts/../../top/x300 > Setting up a 64-bit FPGA build environment for the USRP-X3x0... > - Vivado: Found (/opt/Xilinx/Vivado/2017.4/bin) > > Environment successfully initialized. > make -f Makefile.x300.inc bin NAME=X310_RFNOC_HG ARCH=kintex7 > PART_ID=xc7k410t/ffg900/-2 BUILD_1G=1 BUILD_10G=1 SFP0_1GBE=1 SFP1_10GBE=1 > RFNOC=1 X310=1 TOP_MODULE=x300 EXTRA_DEFS="BUILD_1G=1 BUILD_10G=1 > SFP0_1GBE=1 SFP1_10GBE=1 RFNOC=1 X310=1" > make[1]: Entering directory > '/home/mpnta-rx/rfnoc/src/uhd-fpga/usrp3/top/x300' > BUILDER: Checking tools... > * GNU bash, version 4.3.48(1)-release (x86_64-pc-linux-gnu) > * Python 2.7.12 > * Vivado v2017.4 (64-bit) > *make[1]: *** No rule to make target > '/home/mpnta-rx/rfnoc/src/uhd-fpga/usrp3/lib/xge/rtl/verilog/generic_mem_xilinx_block.v', > needed by 'bin'. Stop.* > make[1]: Leaving directory > '/home/mpnta-rx/rfnoc/src/uhd-fpga/usrp3/top/x300' > Makefile:112: recipe for target 'X310_RFNOC_HG' failed > make: *** [X310_RFNOC_HG] Error 2 > > I have searched my computer for the referenced mission file > *generic_mem_xilinx_block.v* and it is not anywhere on the computer. I > assume that it should have been written when I installed Vivavdo. > > I am fully stuck here. I need to build a custom image, and next add an > OOT FPGA function, but I cant even start until I get past this stage. > > John G > > > > > Sent with ProtonMail <https://protonmail.com> Secure Email. > > _______________________________________________ > Discuss-gnuradio mailing list > Discuss-gnuradio@gnu.org > https://lists.gnu.org/mailman/listinfo/discuss-gnuradio >
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