Hello Kim,

The first two rates (200e6 and 184.32e6) are for the X310 which only
supports those two ADC sampling rates. The third rate (120e6) is no longer
supported, I'll get that removed. 30.72e6 is for the AD9361/AD9364 based
USRPs (B2x0, E310).

The field is a text field so you can enter any value you want. However for
most applications it is best to initialize the device with the master clock
rate set in the device arguments. You can supply a string such as
"master_clock_rate=61.44e6" into the Device Arguments field in the sink
block. If you have a source block using the same USRP the Device Arguments
and Device Address fields must be identical between these blocks.

Regards,
Derek


On Wed, Jun 7, 2017 at 9:37 AM, 김태영 <d...@radarnspace.kr> wrote:

> Hi all
>
>
>
> I'm using Ettus Research USRP device with GRC.
>
> And I have one question.
>
>   <The "sampling rate" is the rate at which samples are passed between the
> host commuter and the USRP.>
>   <The "master_clock_rate" is the rate at which samples are passed between
> FPGA and the RF front end.>
>
>
>
> Is there anybody who can explain me why the clock rate on UHD:USRP sink
> block
>
> have only 4 choice? (200, 184.32, 120, 30.72MHz)
>
>
>
>
>
> Regards
>
> Kim taeyeong
>
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