On 17.06.2014 13:52, Sylvain Munaut wrote:
To me, the wrapping and passing of digital samples seems to put a
stack within the stack. The ends of the chain are unaware of the internal
message passing and act as if the samples were directly passed to the DAC
and ADC, ...
Yes, and ? These are un-related stacks.
Some highend DAC/ADC have high speed serial interfaces and
encode/packetize the data before sensing them to the CPU/FPGA/ASIC
that will deal with the samples, would you consider that a PHY
emulation as well ? The way the samples are transported from one
endpoint to the other is largely irrelevant here ...
I agree, this is the point I was trying to make. Somehow, the samples
have to get from the ADC to the PHY. In the case of a networked device,
it's by Ethernet. On an embedded device, there might be an AXI connection.
The PHY is where the physical signal is handled (or samples in case of
digital systems), hence the name, regardless of where the samples are
from. Of course Ethernet has its own PHY and MAC, but our comms system
doesn't care about this.
M
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