You could only do that by modifying the FPGA.  It would be a very minor
mod, though.  Hook up the undecimated ADC values to where the output of the
decimators go, and leave everything else intact.  Then just set the
decimators as normal and you will get the rate you request.

Matt


On Tue, Feb 25, 2014 at 12:20 PM, Juha Vierinen <x...@mit.edu> wrote:

> Is there any way to bypass the CIC and the HBF on the USRP N200 to just
> stream decimated (no integration) real samples off the 100 MHz ADC? I'd
> like to eg., record every 25th sample arriving on the ADC. I'd like to
> avoid compiling my own fpga is necessary.
>
> Is there any configuration of  calc_cic_filter_word  and
> calc_cordic_word_and_update in the firmware that would magically do this?
>
> juha
>
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