Hello, I'm trying to send FM modulated packet data using the message burst source and it's mostly working.
I am able to see the tx_sob and tx_eob tags using the tag_debug block hooked up to the same final block the USRP sink is (ie, the tags are not getting lost somewhere along the chain). When I examine the output file, the actual data for the bursts do indeed start and end at the offsets listed in the tag_debug output, and there are no samples in between. If I receive the transmitted burst with a second USRP and plot the data, you can see the received waveform at http://imgur.com/ZNuNWjt The tx_sob and tx_eob are pointed out in the diagram, but there is a long period of just a blank carrier at the end of the data being added by the USRP N210. This works for some of the receivers, but is not interoperable with the COTS hardware I'm working with. I've attached the output of the block debug and my USRP instantiation below. You can see that the tx_sob and tx_eob are listed, but that it still gives an underflow indication (I thought the tx_eob was supposed to prevent that). How can I get rid of this extra energy the USRP is adding to the end? Thanks, Jason The output of the tag debug is this: <start output section> Using Volk machine: avx_64_mmx_orc -- Opening a USRP2/N-Series device... -- Current recv frame size: 1472 bytes -- Current send frame size: 1472 bytes U---------------------------------------------------------------------- Tag Debug: print_tags Input Stream: 00 Offset: 0 Source: message_burst_source1 Key: tx_sob Value: #t Offset: 3875 Source: message_burst_source1 Key: tx_eob Value: #t ---------------------------------------------------------------------- U <end output section> My USRP instantiation is: <start code section> # TX Sink self.uhd_usrp_sink_0 = uhd.usrp_sink( device_addr="", stream_args=uhd.stream_args( underflow_policy="next_burst", cpu_format="fc32", channels=range(1), ), ) self.uhd_usrp_sink_0.set_samp_rate(samp_rate) self.uhd_usrp_sink_0.set_center_freq(cfreq, 0) self.uhd_usrp_sink_0.set_gain(15, 0) self.uhd_usrp_sink_0.set_antenna("TX/RX", 0) self.connect((self.unclip, 0), (self.uhd_usrp_sink_0, 0)) <end code section>
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