Hi, I am currently doing channel sounding on USRP N210. There is an example of sounder in the old release 3.4. However, it is designed for usrp1. I am reading its fpga code and trying to follow its work flow. When doing grc based channel sounding, i can not work at a high sampling rate. Also my network card is Intel 82579 gigabit card which seems to have some bugs. It overflows even at several MSPS. So if i wanna modify the FPGA code for N210, where should I start? Also i am wondering if there is some ram on the FPGA of N210 so that i can temporarily cache the data on FPGA. Thanks very much.
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