>Are they supposed to be in 400ms long packets?

Well that is supposed to be the maximum time a FHSS is allowed to
dwell in a channel according to the FCC, so it makes sense.

>Do they use a slow FSK modulation?

According to the FCC test report is uses a CC1020 chip modem which in
its data sheet says it can use slow FSK.

> What daughterboard are you using?  Have you modified the FPGA?

WBX and nope.

> First there is a short burst I not sure about

I was thinking about using a 400ms hop time and I realized how long it
would take for synchronization to occur listening to any one
frequency, what I would do is use a quick burst on a listening
frequency to sync. That may be what that is?

> I read the time ruler in reverse.

Yeah it's strange, the waterfall is flowing up away from the
spectrogram ( as is should ), baudline is counting ms back in time
form the present ( I'm scrolling back in time to find the burst ).

I think I now need to find another old gameboy so I can start a
conversation between them to see if messages are plain text. I am
currently just probably getting the one announcing its presence
signal.

Thanks
~Andrew

On Mon, Jul 2, 2012 at 9:36 PM, Michael Ossmann <m...@ossmann.com> wrote:
> On Mon, Jul 02, 2012 at 08:27:01PM -0400, Andrew Davis wrote:
>>
>> Really cool presentation!  Thanks for the info. Now i'm running into
>> another problem, I sample at about 4MSPS for a bit and try to capture
>> the signal as it passes though my window, but I never seem to get it,
>> just a huge mess of noise, aliasing and ghosts.
>> http://i.imgur.com/w3oBP.jpg
>
> That actually doesn't look so bad to me.  Do you know anything about the
> transmissions from your target device?  Are they supposed to be in 400
> ms long packets?  Do they use a slow FSK modulation?  Are packets
> supposed to happen as often as every 600 ms?  If you don't know that
> stuff, try looking up the FCC test report for the device.
>
> You can ignore all the spurs and images in the frequency domain that are
> 20 dB or more below the loudest thing going on at any particular moment.
> You'll see stuff like that with a USRP, much more so when you are
> intentionally aliasing.
>
> What daughterboard are you using?  Have you modified the FPGA?
>
>> I really can tell what i'm looking at, doesn't look like FHSS to me.
>
> It does to me.  First there is a short burst I not sure about, but then
> there are two events of the same duration, the first was received at a
> lower power than the second.  The first event could be a packet outside
> your band that you are not receiving properly, and the second is within
> your band.  Oh, sorry.  I read the time ruler in reverse.
>
>> I did capture what I think is a sync preamble followed by FSK (
>> http://i.imgur.com/EpMim.jpg )
>
> That looks beautiful!  Except I think it is the time ruler itself that
> is reversed, not my reading of it.  The image is much lower power than
> the main signal.  Just ignore it.  That packet is decodable by eyeball
> in the spectrogram, which is kind of a rare treat.
>
> Throw that thing into grc and decode it!  :-)
>
> If you need help, post the raw file shown in EpMim.jpg somewhere.

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