Also here's a link to a great paper containing a good analysis of how all the HDL modules come together. Worth reading to get a head start but you definitely will want to also look at the code in Xilinx ISE.
FYI you need the full version of ISE to program to the N210. FYI2 the usrp-users mailing list is more appropriate for USRP hardware discussion. Paper: vbn.aau.dk/files/52688059/final.pdf R On Fri, Jun 1, 2012 at 1:34 PM, sibar002 <sibar...@ucr.edu> wrote: > > Hello > > I am currently working on the USRP N210. I am trying to modify the VHDL code > for the FPGA in order to gain acccess to some of the unused pins. I am > unsure of how to do this, and I was wondering if anyone had any advice on > how to do this. I would greatly appreciate any help. Thank you. > > Sam > -- > View this message in context: > http://old.nabble.com/Programming-FPGA-tp33946275p33946275.html > Sent from the GnuRadio mailing list archive at Nabble.com. > > > _______________________________________________ > Discuss-gnuradio mailing list > Discuss-gnuradio@gnu.org > https://lists.gnu.org/mailman/listinfo/discuss-gnuradio _______________________________________________ Discuss-gnuradio mailing list Discuss-gnuradio@gnu.org https://lists.gnu.org/mailman/listinfo/discuss-gnuradio
