I'm also interested in this problem.

I have tried to setup a UHD sink and a UHD source using one USRP2 +
XCVR2450 daughterboard like tunnel.py. The flowgraph is like this: (1) Tx
Path: self.connect(self.txpath, self.sink); (2) Rx Path:
self.connect(self.source, self.rxpath). It works but makes my confused
since XCVR2450 does not support full-duplex operation, attempting to
operate in full-duplex will result in transmit-only operation. How is it
possible to setup a UHD sink and source at the same time with only one
USRP2 + XCVR2450? Does it mean the UHD driver can switch between tx and rx
states automatically? Or does it mean the UHD + 2450 is actually in tx mode?

Any idea would be appreciated. Thanks.


Regards,
Lizhao




2011/10/14 Marcus D. Leech <mle...@ripnet.com>

> On 14/10/2011 10:04 AM, Tuan (Johnny) Ta wrote:
>
>> I'm also interested in this problem. Juan Ramon, did you make any
>> progress? If you did, would you mind sharing it?
>>
>> For Marcus, I have a more general question regarding the flow graph. If I
>> have in my GRC both a UHD sink and a UHD source block, is it true that the
>> USRP2 will stay in receive mode until there're samples on the transmit
>> buffer? Will it then switch to transmit mode and transmit until the
>> transmit buffer is empty and switch back to receive mode?
>>
>> Thanks,
>> Johnny
>>
>>  Basically, yes.  The UHD interface will turn back to receive when the
> End-of-Burst is triggered.  But Josh probably has better details.
>  I'm largely a receive-only guy in my own personal projects.
>
>
>
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