Hi,
> I dont know anything about the state of the 'inband signalling'. It
> works but its not stable? There is an fpga image but no source code?
> Chime in if you know!
There is a inband project in the git fpga source.
It doesn't build out of the box (but then then _std firmware either).
You need to convert the timing constraint to the new .sdc format and
then put back & fix includes for the fpga_regs_common.v &
fpga_regs_standard.v files that were never put in that directory.
Then it compiles and meets timing.
Didn't check if it worked yet tough ...
Sylvain
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