Dear Matt,
Thanks a lot for your reply.
I have Xilinx 10.1 installed (ISE, chipscope...).
I also have a Xilinx USB platform cable 2 which is connected to both USRP2 and
my PC.
So can you help to identify the programming process:
1. I modify boot_cpld.v and implement it with Xilinx
2. I configure USPR2 CPLD through the USB platform cable 2 with the newly
generated files.
My question is:
1. which file I need to use to reprogram the CPLD?
boot_cpld.jed or boot__cpld.bin?
2. Which tool I need to use to download the file to program the CPLD? Xilinx
Chipscope?
A little bit detailed explanation will be extremely help!
Thanks a lot!
Regards,
> Date: Sat, 1 May 2010 16:53:03 -0700
> From: m...@ettus.com
> To: nnu...@hotmail.com
> CC: discuss-gnuradio@gnu.org
> Subject: Re: [Discuss-gnuradio] reprogram the CPLD of USPR2
>
> On 05/01/2010 02:48 PM, utsu nn wrote:
> > Dear all,
> >
> > USRP2 FPGA can be reprogrammed and u2_rev3.bin will be generated and
> > wrote to the SD card.
> >
> > How about reprogramming the CPLD? Any advice on programming CPLD?
> >
> > Please help.
> >
> > Thanks
>
>
> You will need a JTAG programmer. J203 fits the Xilinx platform cable,
> but you can connect directly to the pins if you need. See the USRP2
> Configuration page of the schematics.
>
> Matt
>
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