2009/12/3 hanwen <kidult.han...@gmail.com>
> I've applied the fix to my receiver. It works. The attachment is the
> spectrum before and after the fixing at decimation rate 4 and 5. It shows at
> decimation rate of 4 the 3dB bandwidth is really widened from 7.5MHz to
> 9.5MHz.
> But when decimation rate is 5, the spectrum looks like an arch with over
> 10dB attenuation at age comparing with carrier center. I guess this
> imperfect frequency response is due to the CIC design. Is there a way of
> improve it?
>
> Thanks.
>
> 2009/11/26 Matt Ettus <m...@ettus.com>
>
>
>> Thanks for finding this bug. I have applied your fix to my git repo. I'm
>> away from any equipment right now, but if someone could confirm that this
>> works, Johnathan can get it in the mainline code.
>>
>> Matt
>>
>>
>>
>> On 10/08/2009 01:26 PM, Stephen Lai wrote:
>>
>>> Hi All,
>>>
>>> I've been having problems sending a 25 Msym/s BPSK stream between two
>>> USRP2's with XCVR2450 daughterboards. I've tracked it down to the Rx
>>> circuitry limiting the passband to ~14 MHz when at least 20 MHz should
>>> be available.
>>>
>>> Sifting through the db_xcvr2450.c/db_xcvr2450.cc files, I think there
>>> may be a bug which causes the baseband LPF in the MAX2829 device to
>>> cutoff at 7.5 MHz instead of 9.5 MHz when the board is configured for Rx.
>>>
>>> Referring to "LPF Register" on the MAX2829 datasheet, the old code...
>>>
>>> static void
>>> set_reg_lpf(struct db_xcvr2450_dummy *db){
>>> int reg_lpf = (
>>> (db->common->d_rssi_hbw<<15) |
>>> (db->common->d_txlpf_bw<<10) |
>>> (db->common->d_rxlpf_bw<<9) |
>>> (db->common->d_rxlpf_fine<<4) | 7);
>>> send_reg(reg_lpf);
>>> }
>>>
>>> ...seems like it should read...
>>>
>>> static void
>>> set_reg_lpf(struct db_xcvr2450_dummy *db){
>>> int reg_lpf = (
>>> (db->common->d_rssi_hbw<<15) |
>>> (db->common->d_txlpf_bw<<9) |
>>> (db->common->d_rxlpf_bw<<7) |
>>> (db->common->d_rxlpf_fine<<4) | 7);
>>> send_reg(reg_lpf);
>>> }
>>>
>>> ...to be set correctly.
>>>
>>> Has anybody else had problems with this? I'm using
>>> txrx_edk10.1_r11370.bin. I don't have Xilinx/EDK tools installed on my
>>> setup, but if someone is willing to build a load with the fix, I can
>>> test it out.
>>>
>>> thanks,
>>> Steve
>>>
>>>
>>>
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>>
>>
>>
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