Hi,
I am using a FLEX2400 transceiver daughterboard and was wondering what's
the minimum step size that I can use to set the center frequency.
I tried steps down to 500KHz and I could tell the difference between the
generated carrier frequency of a sine wave on an oscilloscope.
When I tried lower steps I was not able to see any difference in the
generated frequency.
Thanks,
Karim
Sebastiaan Heunis wrote:
Hi
Can anyone please suggest a setup that I can use to test the maximum
value of samples? I know that we have 16bit signed values. Looking
at the ADC interface on the USRP, we sign extend each 12-bit sample
and add 3 zeros to the right. This should give us a maximum value of
16376 for samples?
I tried using a BasicRX daughterboard. I have a function generator,
inputting a 20MHz, 10dBm signal into the db. In my app I mix this
down to 100kHz using the cordic. I also decimate by 16. The PGA gain
is set to 20dB. The FPGA build is the standard 2rx/2tx with hbf. The
maximum sample value that I get with this is 8635, so I'm using about
half of the ADC's dynamic range.
Sebastiaan
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