Dear Ematlis, I want to draw your attention to this remake: When using std_4rx_0tx.rbf FPGA file, the 4 FPGA DDCs does not have low pass filter (the HBF) and you have to do the low pass filtering by software.
Firas, ematlis wrote: > > Ok, great. This simplifies things; I was afraid I was going to have to > create > a modulating circuit to modulate those low-frequency timing signals so > they > could be captured along with the 2 MHz am-modulated signals using a single > tuning frequency. > > I have some questions about the deinterleaver. Firstly, how does it know > how > many channels are interleaved? Does it determine this information from > the Mux > settings, or from the number and type of subdevices detected, or something > else? > > Secondly, in terms of computational efficiency, is there any advantage to > performing the deinterleave operation earlier in the flow-graph sequence, > or > later? For example, I'm doing AM demodulation. So, currently my flow > graph > consists of the usrp block connected to a low-pass filter, connected to a > mag > block, connected to a high-pass filter (to remove dc), connected to a > block > that corrects for gain, connected to a block that factors in a > "calibration > constant" for the data path, and finally the file-write. I also branch > off to > some fft sinks. Is it necessary for me to introduce a deinterleave block > immediately after the usrp block or can I put it anywhere? > > Thirdly, if all I was doing was capturing to file, is the deinterleaver > strictly necessary? I could write a program to deinterleave the data in > the > file in post-processing, correct? > > thanks! > eric > > On Fri, 1 Jun 2007, Eric Blossom wrote: > >> On Fri, Jun 01, 2007 at 09:27:55AM -0400, [EMAIL PROTECTED] wrote: >>> Excellent. Just so I understand how this is done- when one tunes >>> different subdevices to different frequencies, is there one LO on the >>> USRP >>> which is being switched between these frequencies, or is there more than >>> one LO? >> >> In general, the tuning is split between an LO on the daughterboard and >> the DDCs in the the FPGA. In the case of the Basic Rx and LF RX, >> there is no LO on the daughterboard, so all the tuning is handled by >> the DDC. When using std_4rx_0tx.rbf, there are 4 DDCs available in >> the FPGA. >> >> u.tune(...) handles adjusting the LO (if any) and the DDCs >> transparently for the common case. >> >>> Also- Can I tune all four subdevices independently, or am I restricted >>> to >>> using the same frequency on a given daughterboard? >> >> With the Basic and LF Rx everything is independent, since there's no >> LO on the daughterboard. In the case of daughterboards with LO's, >> life is a bit more complicated and you'll have to explicitly control >> the LO on the daughterboard, and then explicitly control the 2 DDCs >> that are being fed from the given daughterboard. You of course need >> to ensure that that two frequencies that you want within the IF >> passband of the daughterboard. >> >> To see how this is currently handled, take a look at the >> implementation of "tune" in gr-usrp/src/usrp.py >> >>> Finally- I would guess that at a minimum the decimation factor set in >>> the >>> fpga must be the same for all subdevices. Is this correct? >> >> Yes, the decimation rate applies to all subdevices. >> >>> thanks again, >>> eric >> >> You're welcome! >> >> Eric >> > > > _______________________________________________ > Discuss-gnuradio mailing list > Discuss-gnuradio@gnu.org > http://lists.gnu.org/mailman/listinfo/discuss-gnuradio > > -- View this message in context: http://www.nabble.com/multi_file-usrp-tuning-options-tf3848653.html#a10962532 Sent from the GnuRadio mailing list archive at Nabble.com. _______________________________________________ Discuss-gnuradio mailing list Discuss-gnuradio@gnu.org http://lists.gnu.org/mailman/listinfo/discuss-gnuradio
