Dear Matt, Dear All,
Is the DDC decimate by 2 half band filter built inside the FPGA ? If it is so, then how much the free available FPGA resources left after building all the present USPR circuits in it? I mean, is there a free space to modify the CIC + HBF circuit and to build a complete DDC block (CIC + CFIR + PFIR) ? Thank you in advance. Firas -- View this message in context: http://www.nabble.com/Free-USRP-FPGA-Resources-tf3625577.html#a10123967 Sent from the GnuRadio mailing list archive at Nabble.com. _______________________________________________ Discuss-gnuradio mailing list Discuss-gnuradio@gnu.org http://lists.gnu.org/mailman/listinfo/discuss-gnuradio
