On 3/4/07, Brian Padalino <[EMAIL PROTECTED]> wrote:
With regards to the PCIe interface, were you looking more at just
getting a PHY transceiver and putting the MAC and other layers in the
FPGA, or were you more interested in having a PCIe bridge chip that
handles all of that for you?
I know Philips and TI have PCIe transceivers which work with Xilinx
and Altera IP for the MAC layer, but what I really found interesting
was a PCIe bridge chip from PLX technologies. It's a relatively hefty
BGA, but if you can place it properly the chip could really be a huge
help. No NDA's are required and the information can be found here.
http://www.plxtech.com/products/expresslane/pex8311.asp
Do you have a place where you are hosting your thoughts/ideas on the
subject, or just some e-mail threads?
Brian
It's a very nice chip, but it appears to be very expensive at $38... =(
TI's costs $7, which is quite affordable.
I'm not sure how to address the IP core issue yet. The Open Graphics
project will have to deal with it sooner or later, but I hope we will
coordinate efforts. I told them what I had discovered so far, but I'll
have to see how that discussion turns out before I can say if it'll be
any help. If you know anything about the problems I need to solve, I'd
love to hear about it. :)
I don't have a site yet since so far I have little but a fuzzy picture
of what I want to do. I'm still trying to find out if it is actually
even doable. The hardware seems possible, even for $100 if I use a
slightly cheaper ADC than I'd like, but to then process this massive
amount of data I'm rather unsure about. I emailed the FFTW project,
since I figure they're the experts, but as of yet I've seen no reply.
Might be there's no one checking emails at weekends...
Once I have gathered a little more real data and can come up with a
workable plan I'll probably set up a site of some sort. Maybe a simple
blog.
Thanks for the reply!
--
Nos
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