> I think the limitation is on the 8051 end. One 512-byte packet takes
> 8.53 microseconds to cross the USB channel, and the 35.7 MByte/sec
> sustained rate implies the 8051 sets up the next packet in only 5.81
> microseconds. I don't think there is any pipelining at this level.
You're probably right. It's known that the SSRP (which had no FPGA,
just a USB interface and an ADC) got higher thruput, because it
programmed the USB interface registers to automatically stream data
through without the intervention of the 8051. (It knew all the
traffic was inbound, so didn't need the option to switch directions on
the bus.)
We could get a similar speedup in the USRP (or LLRF) by having the
8051 jump to different inner loops when doing input-only, output-only,
or both input and output over the USB bus. Think of it as hoisting
one of the invariant decisions out of the inner loop.
John
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