> Why would it take 8 clocks?  Surely the hardware could do the hard
> part (jam it to zero immediately) and the software could do the rest
> (if it needs to taper off over 8 clocks, end with the right samples).
> 

Ramping down results in a cleaner spectrum.  Immediate shutoff splatters
the band.

> Hmm, in fact, why is this a problem at all?  Why can't the software
> ensure that the final sample before underrun is a zero?  The hardware
> will then keep repeating this final sample forever.

That would be the best way to go.

> (I suppose this would be possible if you aren't using any of the
> upconverters -- but if the FPGA or the DAC is upconverting, then you
> have to jam a real zero, not an upconverted zero?  Is this even
> possible?)

An upconverted zero is still a zero.  It's a multiplicative process.

Matt




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