Update on status:
I purchased a 44 Mhz oscillator from digi-key (p/n 300-7254-1-ND,
CSX750FJC44) for $3.38. The first attempt to remove the USRP 64 MHz failed
miserably with a pen iron. I purchased a heat gun from digi-key (MA1008-ND)
for $52, set it to the 1000 degree setting and the old oscillator came up in
about 10 seconds. Installed the new oscillator and checked the 44 MHz clock
with a scope.
I then tried to run my customized dbs application that records 8-bit I/Q
data to a file for me from any of the 802.11b channels. Got all zeros in the
data. Then remembered eric told me to change the clock in db_dbs_rx.py.
My code is a little older than current but here's my mods in
gr-usrp/src/db_dbs_rx.py:
1. change line 88 from
self.refclk_divisor = 16
to
self.refclk_divisor = 11
2. change line 108 from
return 64e6/self.refclk_divisor
to
return 44e6/self.refclk_divisor
then in /gr-usrp I did
make clean
make
make check
make install
Reran my custom dbs program and it worked fine EXCEPT:
The default decimation is 4 so I'm recording at 11 megasamples per second.
(oddly enough I'm still able to demodulate my 802.11b packets fine even
though the chip rate is 11 mcps!?) When I try a decimation rate of 2 I get
the message:
usrp_standard_rx::set_dim_rate: rate must be EVEN and in [4,256]
I am using the std_4rx_0tx.rbf fpga design. Is the min decimation really 4?
If necessary I will go modify that fpga to just have a halfband so I can
record at 22 complex megasamples per second which is enough bandwidth to
support 802.11a/g. Can't beat more bandwidth at less power.:)
Thanks,
Clark
From: Eric Blossom <[EMAIL PROTECTED]>
To: Clark Pope <[EMAIL PROTECTED]>
CC: discuss-gnuradio@gnu.org
Subject: Re: [Discuss-gnuradio] Run USRP at alternate clock frequency?
Date: Fri, 10 Mar 2006 13:48:52 -0800
On Fri, Mar 10, 2006 at 11:21:08AM -0500, Clark Pope wrote:
>
> I would like to run my USRP off a 44 MHz clock instead of the 64 MHz
clock
> that is currently used. A couple reasons:
> 1. the 64MHz rate exceeds the USB bandwidth even with byte-wide samples
> (64*8 = 512 mbps)
> 2. 44 MHz works much better for the wlan signals I'm after
>
> So the questions are:
> 1. can I generate a 44Mhz clock from the 64 MHz or do I have to change
the
> crystal?
You need to change the crystal.
You'll also need to change the definition of
/*!
* \brief return frequency of master oscillator on USRP
*/
long fpga_master_clock_freq () const { return 64000000; }
in usrp_basic.h The rest of the code should follow, though I haven't
tested it. YMMV, patches welcome ;)
> 2. If I change over to 44 MHz will everything else still work?
Especially
> the dbs and flex2400 boards?
Not sure about those. Paging Matt Ettus, paging Matt Ettus...
Eric
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