That is the shape of the 4-stage decimating CIC filter in the FPGA.  For 
now, sample at 2X or 4X the desired band width and then process using the 
host processor.  Half band filters are on the way to help correct this 
problem.


On Mon, 18 Apr 2005, Lamar Owen wrote:

> Anyone have any idea why the noise floor baselines would be curved?  Attached 
> is a png of an example.
> 
> I would have expected it to be flatter.
> 



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