A lot of questions about DC offset have come up lately, so I just wanted to clear things up a bit. The discussion applies to both TX and RX, but I will speak in terms of the RX.
The USRP has 2 kinds of DC offset. The first is "real" DC offset. All AD converters have some natural DC offset to them. If you look at an FFT plot with the digital downconverters set to a frequency of 0 (DC), you will see a spike at 0. If you use the scope with no input signal, you will see that I and Q are each centered around a different nonzero level. If you set the DDC frequency to something nonzero, the DC offset will be translated away from DC. For example, if you set the DDC frequency to -200 kHz, the DC will now look like a tone at -200kHz. If the DDC frequency is big enough to put DC outside of the passband, you will no longer see it. This kind of DC offset is OK, and we have a provision to null it out. We rarely use it, but you can see how it is done in the dbs_debug.py example. The second kind of DC offset is a small problem. This kind always appears at DC, no matter what the DDC frequency is. This one is due to incompletely implemented rounding in the FPGA, and is always equivalent to -0.5 LSB. It is very small, but does show up in FFT plots. I haven't been able to find the time to finish the rounding. This small offest is only noticeable with very little or no gain in the front ends. If you are using the TVRX board, for example, you should never even see this, since it will always give you signals much bigger than -0.5 LSB. Matt _______________________________________________ Discuss-gnuradio mailing list Discuss-gnuradio@gnu.org http://lists.gnu.org/mailman/listinfo/discuss-gnuradio
