jinhongyii opened a new pull request, #20329: URL: https://github.com/apache/tvm/pull/20329
The SM100 `tcgen05.mma.ws` SS/TS entries omit the collector-B modifier slot, preventing callers from expressing weight-stationary B reuse through the PTX namespace. Add the existing optional B0–B3 fill/use/lastuse/discard domain to both entries, preserving calls that omit the qualifier. Also reject modifier-domain and operand-count mismatches during code generation, before stale table/codegen layouts can emit malformed CUDA helpers. Add dispatch and parser round-trip regressions, SM100 certification for all WS variants, and stale-layout diagnostics. Make the test source helper accept an explicit target so the existing SM107 collector test compiles at its required architecture. Validation with CUDA 13.4 NVCC/NVRTC and a matching worktree FFI: - PTX dialect, conversion, and address suites: 179 non-skipped cases passed across the full run and targeted reruns. - Full-table NVCC/ptxas certification: **32/32 shards passed**, including predicated helpers and address-offset samples at their declared architectures. - Regenerated IDE stubs: no diff needed; the tokens already exist in the ti16 families. - Changed-file pre-commit hooks and `git diff --check` passed. Closes #20328. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected] --------------------------------------------------------------------- To unsubscribe, e-mail: [email protected] For additional commands, e-mail: [email protected]
