On Monday, 22 August 2016 at 05:02:41 UTC, jkpl wrote:
On Monday, 22 August 2016 at 04:52:40 UTC, Cauterite wrote:
[...]
That's a 32 bit codegen issue then because DMD64 's disasm
shows that SSE regs are used:
====
void foo()
{
union test { int i; float f; }
test t = { i : 0x7fb00000};
float t2 = t.f;
test t3 = { f : t2 };
}
===
yields to
===
00000000004586D0h push rbp
00000000004586D1h mov rbp, rsp
00000000004586D4h sub rsp, 10h
00000000004586D8h mov dword ptr [rbp-10h], 7FB00000h
00000000004586DFh movss xmm0, dword ptr [rbp-10h]
00000000004586E4h movss dword ptr [rbp-0Ch], xmm0
00000000004586E9h movss xmm1, dword ptr [rbp-0Ch]
00000000004586EEh movss dword ptr [rbp-08h], xmm1
00000000004586F3h leave
00000000004586F4h ret
===
x86 give 7FF and x64 gives 7FB in win.
