From: Ard Biesheuvel <a...@kernel.org>
Drop the CLANG3x build options, and add ones for CLANGDWARF so that
SynQuacer based platforms can be built with it.
Instead of copying the -no-integrated-as option that CLANG3x used, let's
fix the assembler code so it can be built with Clang's integrated
assembler. Also switch to LLD for linking the code, which is what
CLANGDWARF uses natively (and build hosts may lack a cross linker for
AArch64 when using CLANGDWARF)
Signed-off-by: Ard Biesheuvel <a...@kernel.org>
---
Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.inf | 3 +--
Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S | 4 ++--
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.inf
b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.inf
index 7b396db826a5..8c331738c81a 100644
--- a/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.inf
+++ b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.inf
@@ -23,5 +23,4 @@ [BuildOptions]
*_*_AARCH64_OBJCOPY_FLAGS = -I elf64-little
*_*_ARM_OBJCOPY_FLAGS = -I elf32-little
*_*_*_ASM_FLAGS == -nostdlib
-Wl,-e,0x81f8000,--section-start=.rodata=0x81f8000
- *_CLANG35_*_ASM_FLAGS = -no-integrated-as
- *_CLANG38_*_ASM_FLAGS = -no-integrated-as
+ *_CLANGDWARF_*_ASM_FLAGS = -target aarch64-linux-gnu -fuse-ld=lld -Wl,-no-pie
diff --git a/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S
b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S
index a7f0eb2b7742..4f7c2aae20a1 100644
--- a/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S
+++ b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S
@@ -54,13 +54,13 @@
TT_S2_VALID | (\cont << TT_S2_CONT_SHIFT)
.endm
- .macro s2_l3_entry, base, offset=0, cont=0
+ .macro s2_l3_entry, base, offset=0, cont=0, ignore=0
.quad ((\base << 12) + \offset) | TT_S2_AF | TT_S2_AP_RW | \
TT_S2_SH_NON_SHAREABLE | TT_S2_MEMATTR_MEMORY_WB | \
TT_S2_L3_PAGE | TT_S2_VALID | (\cont << TT_S2_CONT_SHIFT)
.endm
- .macro smmu_l3_entry, base, offset=0, ignore=0
+ .macro smmu_l3_entry, base, offset=0, ignore=0, ignore2=0
.quad ((\base << 12) + \offset) | TT_S2_AF | TT_S2_AP_RO | \
TT_S2_SH_NON_SHAREABLE | TT_S2_MEMATTR_DEVICE_nGnRE | \
TT_S2_L3_PAGE | TT_S2_VALID
--
2.46.0.rc1.232.g9752f9e123-goog
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