REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4716
Tcg module should use permanent address of FSP-T/M for measurement. TCG notification checks MigatedFvInfoHob and transmits DRAM address for measurement. Cc: Chasel Chiu <chasel.c...@intel.com> Cc: Nate DeSimone <nathaniel.l.desim...@intel.com> Cc: Duggapu Chinni B <chinni.b.dugg...@intel.com> Cc: Chen Gang C <gang.c.c...@intel.com> Signed-off-by: Zhihao Li <zhihao...@intel.com> --- IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c | 38 ++++++++++++++++---- IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf | 3 +- 2 files changed, 33 insertions(+), 8 deletions(-) diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c index 7f1deb95426f..cc9ee5679a12 100644 --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c @@ -3,7 +3,7 @@ register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi notify to call FspSiliconInit API. - Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR> + Copyright (c) 2014 - 2024, Intel Corporation. All rights reserved.<BR> SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -38,6 +38,7 @@ #include <FspStatusCode.h> #include <FspGlobalData.h> #include <Library/FspCommonLib.h> +#include <Guid/MigratedFvInfo.h> extern EFI_GUID gFspHobGuid; @@ -278,18 +279,41 @@ TcgPpiNotify ( IN VOID *Ppi ) { - UINT32 FspMeasureMask; + UINT32 FspMeasureMask; + EFI_PHYSICAL_ADDRESS FsptBaseAddress; + EFI_PHYSICAL_ADDRESS FspmBaseAddress; + EDKII_MIGRATED_FV_INFO *MigratedFvInfo; + EFI_PEI_HOB_POINTERS Hob; DEBUG ((DEBUG_INFO, "TcgPpiNotify FSPM\n")); - FspMeasureMask = PcdGet32 (PcdFspMeasurementConfig); + FspMeasureMask = PcdGet32 (PcdFspMeasurementConfig); + FsptBaseAddress = (EFI_PHYSICAL_ADDRESS)PcdGet32 (PcdFsptBaseAddress); + FspmBaseAddress = (EFI_PHYSICAL_ADDRESS)PcdGet32 (PcdFspmBaseAddress); + Hob.Raw = GetFirstGuidHob (&gEdkiiMigratedFvInfoGuid); + while (Hob.Raw != NULL) { + MigratedFvInfo = GET_GUID_HOB_DATA (Hob); + if ((MigratedFvInfo->FvOrgBase == (UINT32)(UINTN)PcdGet32 (PcdFsptBaseAddress)) && (MigratedFvInfo->FvDataBase != 0)) { + // + // Found the migrated FspT raw data + // + FsptBaseAddress = MigratedFvInfo->FvDataBase; + } + + if ((MigratedFvInfo->FvOrgBase == (UINT32)(UINTN)PcdGet32 (PcdFspmBaseAddress)) && (MigratedFvInfo->FvDataBase != 0)) { + FspmBaseAddress = MigratedFvInfo->FvDataBase; + } + + Hob.Raw = GET_NEXT_HOB (Hob); + Hob.Raw = GetNextGuidHob (&gEdkiiMigratedFvInfoGuid, Hob.Raw); + } if ((FspMeasureMask & FSP_MEASURE_FSPT) != 0) { MeasureFspFirmwareBlob ( 0, "FSPT", - PcdGet32 (PcdFsptBaseAddress), - (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32 (PcdFsptBaseAddress))->FvLength + FsptBaseAddress, + (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)FsptBaseAddress)->FvLength ); } @@ -297,8 +321,8 @@ TcgPpiNotify ( MeasureFspFirmwareBlob ( 0, "FSPM", - PcdGet32 (PcdFspmBaseAddress), - (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32 (PcdFspmBaseAddress))->FvLength + FspmBaseAddress, + (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)FspmBaseAddress)->FvLength ); } diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf index 0307ce0acc52..a0f384f9924e 100644 --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf @@ -6,7 +6,7 @@ # register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi # notify to call FspSiliconInit API. # -# Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR> +# Copyright (c) 2014 - 2024, Intel Corporation. All rights reserved.<BR> # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -69,6 +69,7 @@ [Guids] gFspHobGuid ## PRODUCES ## HOB gFspApiPerformanceGuid ## SOMETIMES_CONSUMES ## GUID + gEdkiiMigratedFvInfoGuid ## SOMETIMES_CONSUMES ## HOB [Ppis] gEdkiiTcgPpiGuid ## NOTIFY -- 2.44.0.windows.1