We want to make sure that CPU topology information given to QEMU would be provided to the operating system. So we use SMC call to ask TF-A for amount of sockets, clusters, cores and threads set in QEMU config.
The TF-A part is already merged: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/27189 Signed-off-by: Xiong Yining <xiongyining1...@phytium.com.cn> Signed-off-by: Marcin Juszkiewicz <marcin.juszkiew...@linaro.org> To: devel@edk2.groups.io Cc: Leif Lindholm <quic_llind...@quicinc.com> Cc: Ard Biesheuvel <ardb+tianoc...@kernel.org> Cc: Graeme Gregory <gra...@xora.org.uk> Cc: Chen Baozi <chenba...@phytium.com.cn> Cc: Xiong Yining <xiongyining1...@phytium.com.cn> Cc: Jonathan Cameron <jonathan.came...@huawei.com> Changes in v5: - added support for cache sizes on cores with FEAT_CCIDX (Neoverse V1+) - Link to v4: https://openfw.io/edk2-devel/20240710-acpi65-v4-0-bc32224e4...@linaro.org Changes in v4: - renamed all *Index variables to *Offset ones for clarity - renamed static CpuId/CacheId variable to mCpuId/mCacheId - moved above variables outside of pragma pack - moved all variables definitions to start of functions - added reading cpu cache size from CCIDR registers - changed wording in SbsaHardwareInfoLib header - changed wording in 3rd patch commit message - Link to v3: https://openfw.io/edk2-devel/20240709-acpi65-v3-0-ee93ba536...@linaro.org Changes in v3: - split ACPI 6.5 changes into separate patch - moved adding cores/threads to separate function - fixed cache offsets - Link to v2: https://openfw.io/edk2-devel/20240702-acpi65-v2-0-3cb18a892...@linaro.org/T/#t Changes in v2 (Marcin Juszkiewicz): - use ACPI 6.5 structures (instead of 6.3) - add patch to move cache data to cores (instead of clusters) - this is for future MPAM support - reformatted sources using uncrustify - changed debug output to allow singular values (s/are/:/) --- Marcin Juszkiewicz (5): SbsaQemu: get the information of CPU topology via SMC calls SbsaQemu: update PPTT to ACPI 6.5 SbsaQemu: provide cache info per core in PPTT SbsaQemu: introduce helper in PPTT generation SbsaQemu: export proper cache values in PPTT Xiong Yining (1): SbsaQemu: align the PPTT tables with QEMU .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h | 11 + .../Include/IndustryStandard/SbsaQemuAcpi.h | 110 +++----- .../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 1 + .../Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h | 26 ++ .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 274 +++++++++++++++++--- .../SbsaQemuHardwareInfoLib.c | 36 +++ 6 files changed, 342 insertions(+), 116 deletions(-) --- base-commit: ad553efc01125cad4ebdbe694b82cf6a59ce6a03 change-id: 20240702-acpi65-1bfdb20bde1a Best regards, -- Marcin Juszkiewicz <marcin.juszkiew...@linaro.org> -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#119893): https://edk2.groups.io/g/devel/message/119893 Mute This Topic: https://groups.io/mt/107160638/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
