Hi Dora, Feedback below.
Thanks, Nate > -----Original Message----- > From: Hsueh, DoraX <dorax.hs...@intel.com> > Sent: Monday, April 22, 2024 1:37 AM > To: devel@edk2.groups.io > Cc: Hsueh, DoraX <dorax.hs...@intel.com>; Chaganty, Rangasai V > <rangasai.v.chaga...@intel.com>; Chuang, Rosen <rosen.chu...@intel.com>; > Kasbekar, Saloni <saloni.kasbe...@intel.com>; Tang, Haoyu > <haoyu.t...@intel.com>; Desimone, Nathaniel L > <nathaniel.l.desim...@intel.com>; Chiu, Chasel <chasel.c...@intel.com> > Subject: [PATCH] AlderlakeOpenBoardPkg: Fix BootStage 5 can't install > Windows11. > > From: DoraX Hsueh <dorax.hs...@intel.com> > > https://bugzilla.tianocore.org/show_bug.cgi?id=4665 > > 1. Since installing windows does not meet the minimum system requirements, > Added TPM related code to meet the requirements. > 2. Support stage 6, add FvAdvancedPreMemory. > > Cc: Sai Chaganty <rangasai.v.chaga...@intel.com> > Cc: Rosen Chuang <rosen.chu...@intel.com> > Cc: Saloni Kasbekar <saloni.kasbe...@intel.com> > Cc: Haoyu Tang <haoyu.t...@intel.com> > Cc: Nate DeSimone <nathaniel.l.desim...@intel.com> > Cc: Chasel Chiu <chasel.c...@intel.com> > Signed-off-by: DoraX Hsueh <dorax.hs...@intel.com> > --- > .../Include/Fdf/FlashMapInclude.fdf | 26 +++++++------ > .../AlderlakePRvp/OpenBoardPkg.dsc | 1 + > .../AlderlakePRvp/OpenBoardPkg.fdf | 37 +++++++++++++++++-- > .../AlderlakePRvp/OpenBoardPkgPcd.dsc | 10 ++++- > 4 files changed, 57 insertions(+), 17 deletions(-) > > diff --git > a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf > > b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf > index 03c198c0..3e515d4e 100644 > --- > a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf > +++ > b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf > @@ -26,27 +26,29 @@ SET > gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = 0x000300 > SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = > 0x00030000 # > > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = > 0x000E0000 # Flash addr (0xFF0E0000) > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = > 0x00310000 # > -SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = > 0x003F0000 # Flash addr (0xFF400000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = > 0x002E0000 # > +SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = > 0x003C0000 # Flash addr (0xFF3C0000) > SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize = > 0x00360000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = > 0x00750000 # Flash addr (0xFF760000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = > 0x00720000 # Flash addr (0xFF720000) > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize = > 0x00090000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = > 0x007E0000 # Flash addr (0xFF7F0000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = > 0x007B0000 # Flash addr (0xFF7B0000) > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize = > 0x000A0000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = > 0x00880000 # Flash addr (0xFF860000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = > 0x00850000 # Flash addr (0xFF850000) > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = > 0x00180000 # > > -SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = > 0x00A00000 # Flash addr (0xFFA00000) > +SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = > 0x009D0000 # Flash addr (0xFF9D0000) > SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = > 0x00080000 # Keep 0x80000 or larger > -SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = > 0x00A80000 # Flash addr (0xFFA80000) > +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = > 0x00A50000 # Flash addr (0xFFA50000) > SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = > 0x00230000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = > 0x00CB0000 # Flash addr (0xFFCB0000) > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = > 0x00040000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = > 0x00CF0000 # Flash addr (0xFFCF0000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = > 0x00C80000 # Flash addr (0xFFC80000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = > 0x00060000 # > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = > 0x00CE0000 # Flash addr (0xFFCE0000) > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = > 0x000A0000 > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = > 0x00D90000 # Flash addr (0xFFD90000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = > 0x00D80000 # Flash addr (0xFFD80000) > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize = > 0x00150000 > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = > 0x00EE0000 # Flash addr (0xFFEE0000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = > 0x00ED0000 # Flash addr (0xFFED0000) > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = > 0x00010000 > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset = > 0x00EE0000 # Flash addr (0xFFEE0000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize = > 0x00010000 # > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset = > 0x00EF0000 # Flash addr (0xFFEF0000) > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize = > 0x00110000 > diff --git > a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc > b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc > index 4cdc9c01..8468410e 100644 > --- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc > +++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc > @@ -49,6 +49,7 @@ > # Include PCD configuration for this board > # > !include OpenBoardPkgPcd.dsc > + !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc > > > ################################################################################ > # > diff --git > a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf > b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf > index f1ce271b..3115ce50 100644 > --- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf > +++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf > @@ -113,9 +113,15 @@ DATA = { > #Blockmap[1]: End > 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, > ## This is the VARIABLE_STORE_HEADER > +!if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE > + # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, > 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }} > + 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43, > + 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92, > +!else > # Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, > 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }} > 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41, > 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d, > +!endif > #Size: 0x2E000 > (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size > of EFI_FIRMWARE_VOLUME_HEADER) = 0x2DFB8 > # This can speed up the Variable Dispatch a bit. > 0xB8, 0xDF, 0x02, 0x00, > @@ -189,6 +195,10 @@ > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|gMinPlatformPkgTokenSpaceGuid.P > # FSP_T Section > FILE = $(PLATFORM_FSP_BIN_PACKAGE)/Fsp_Rebased_T.fd > > +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize > +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize > +FV = FvAdvancedPreMemory > + > > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize > > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize > FV = FvPreMemory > @@ -646,6 +656,29 @@ INF > $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf > > INF IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/SmmAccess.inf > > +# > +# Pre-memory Advanced Features > +# > +[FV.FvAdvancedPreMemory] > +FvAlignment = 16 > +ERASE_POLARITY = 1 > +MEMORY_MAPPED = TRUE > +STICKY_WRITE = TRUE > +LOCK_CAP = TRUE > +LOCK_STATUS = TRUE > +WRITE_DISABLED_CAP = TRUE > +WRITE_ENABLED_CAP = TRUE > +WRITE_STATUS = TRUE > +WRITE_LOCK_CAP = TRUE > +WRITE_LOCK_STATUS = TRUE > +READ_DISABLED_CAP = TRUE > +READ_ENABLED_CAP = TRUE > +READ_STATUS = TRUE > +READ_LOCK_CAP = TRUE > +READ_LOCK_STATUS = TRUE > +FvNameGuid = 6053D78A-457E-4490-A237-31D0FBE2F305 > + > +!include AdvancedFeaturePkg/Include/PreMemory.fdf > You forgot to add FvAdvancedUncompact and the include for AdvancedFeaturePkg/Include/PostMemory.fdf. Something like this should be added: [FV.FvAdvancedUncompact] FvAlignment = 16 ERASE_POLARITY = 1 MEMORY_MAPPED = TRUE STICKY_WRITE = TRUE LOCK_CAP = TRUE LOCK_STATUS = TRUE WRITE_DISABLED_CAP = TRUE WRITE_ENABLED_CAP = TRUE WRITE_STATUS = TRUE WRITE_LOCK_CAP = TRUE WRITE_LOCK_STATUS = TRUE READ_DISABLED_CAP = TRUE READ_ENABLED_CAP = TRUE READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE FvNameGuid = BE3DF86F-E464-44A3-83F7-0D27E6B88C27 !include AdvancedFeaturePkg/Include/PostMemory.fdf > [FV.FvAdvanced] > BlockSize = $(FLASH_BLOCK_SIZE) > @@ -688,10 +721,6 @@ READ_LOCK_CAP = TRUE > READ_LOCK_STATUS = TRUE > FvNameGuid = 8B98AB22-E354-42f0-88B9-049810F0FDAA > You forgot to add the nested FV for FvAdvancedUncompact. Something like this should be included: FILE FV_IMAGE = 5248467B-B87B-4E74-AC02-398AF4BCB712 { SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { SECTION FV_IMAGE = FvAdvancedUncompact } } > - > - > - > - > [FV.FvOptional] > BlockSize = $(FLASH_BLOCK_SIZE) > FvAlignment = 16 > diff --git > a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc > b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc > index 3eb9a575..b52ed92c 100644 > --- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc > +++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc > @@ -25,7 +25,7 @@ > # Stage 5 - boot to OS with security boot enabled > # Stage 6 - boot with advanced features enabled > # > - gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4 > + gMinPlatformPkgTokenSpaceGuid.PcdBootStage|5 > > # > # 0: FSP Wrapper is running in Dispatch mode. > @@ -313,6 +313,14 @@ > gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0x00000000 > gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|16 > gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE > > +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE > + gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|1 > + gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28, > 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17} > +!endif > + > +[PcdsDynamicHii.common.DEFAULT] > + > gEfiSecurityPkgTokenSpaceGuid.PcdTpm2AcpiTableRev|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x8|4|NV,BS > + > [PcdsDynamicHii.X64.DEFAULT] > > gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 > # Variable: L"Timeout" > > gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 > # Variable: L"HwErrRecSupport" > -- > 2.26.2.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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