https://bugzilla.tianocore.org/show_bug.cgi?id=4727

Recently some of XHCI host controllers require to have
extra 1ms delay before accessing any MMIO register
during reset. PHY transition from P3 to P0 can take
around 1.3ms and the xHCI reset can take around 1.5ms.
Add PCD to control the delay, the default is 2 ms.

Cc: Ray Ni                   <ray...@intel.com>
Cc: Liming Gao               <gaolim...@byosoft.com.cn>
Cc: Krzysztof Lewandowski    <krzysztof.lewandow...@intel.com>
Cc: Jenny Huang              <jenny.hu...@intel.com>
Cc: More Shih                <more.s...@intel.com>
Cc: Ian Chiu                 <ian.c...@intel.com>
Signed-off-by: Xianglei Cai <xianglei....@intel.com>
Reviewed-by: Krzysztof Lewandowski <krzysztof.lewandow...@intel.com>
---
 MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h      | 1 +
 MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf | 4 ++++
 MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c   | 2 +-
 MdeModulePkg/MdeModulePkg.dec            | 5 +++++
 4 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h 
b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
index 44016758724c..c9a12095c29e 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
@@ -28,6 +28,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <Library/DebugLib.h>
 #include <Library/ReportStatusCodeLib.h>
 #include <Library/TimerLib.h>
+#include <Library/PcdLib.h>
 
 #include <IndustryStandard/Pci.h>
 
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf 
b/MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
index 18ef87916ae4..e6c1ac8a6346 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
@@ -56,6 +56,7 @@
   DebugLib
   ReportStatusCodeLib
   TimerLib
+  PcdLib
 
 [Guids]
   gEfiEventExitBootServicesGuid                 ## SOMETIMES_CONSUMES ## Event
@@ -64,6 +65,9 @@
   gEfiPciIoProtocolGuid                         ## TO_START
   gEfiUsb2HcProtocolGuid                        ## BY_START
 
+[Pcd]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdDelayXhciHCReset  ## CONSUMES
+
 # [Event]
 # EVENT_TYPE_PERIODIC_TIMER       ## CONSUMES
 #
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c 
b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
index 40f2f1f22766..525942a167b0 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
@@ -864,7 +864,7 @@ XhcResetHC (
     // Otherwise there may have the timeout case happened.
     // The below is a workaround to solve such problem.
     //
-    gBS->Stall (XHC_1_MILLISECOND);
+    gBS->Stall (PcdGet16 (PcdDelayXhciHCReset));
     Status = XhcWaitOpRegBit (Xhc, XHC_USBCMD_OFFSET, XHC_USBCMD_RESET, FALSE, 
Timeout);
 
     if (!EFI_ERROR (Status)) {
diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index a91058e5b5df..d9e2e724df9e 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -1148,6 +1148,11 @@
   # @Prompt Enable large address image loading.
   
gEfiMdeModulePkgTokenSpaceGuid.PcdImageLargeAddressLoad|TRUE|BOOLEAN|0x30001059
 
+  ## Indicates time delay for XHCI registers access after it issues HCRST.
+  # Default is 2000, it represent delay is 2 ms.
+  # @Prompt Delay access XHCI register after it issues HCRST (us)
+  gEfiMdeModulePkgTokenSpaceGuid.PcdDelayXhciHCReset|2000|UINT16|0x30001060
+
 [PcdsFixedAtBuild, PcdsPatchableInModule]
   ## Dynamic type PCD can be registered callback function for Pcd setting 
action.
   #  PcdMaxPeiPcdCallBackNumberPerPcdEntry indicates the maximum number of 
callback function
-- 
2.42.0.windows.2



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