Hi, Sunil V L
Do I still need to send a v2 version of the RB tag with “Jingyu Li
<jingyu.l...@sophgo.com>”?
Or did you help add RB tag with “Jingyu Li <jingyu.l...@sophgo.com>” during
the merger?
Best Regards,
WangYang
> -----原始邮件-----
> 发件人: "Sunil V L" <suni...@ventanamicro.com>
> 发送时间: 2024-04-03 11:48:59 (星期三)
> 收件人: "Yang Wang" <wangy...@bosc.ac.cn>
> 抄送: caiyuqing...@outlook.com, devel@edk2.groups.io, USER0FISH
> <libing1...@outlook.com>, dahogn <dah...@hotmail.com>, meng-cz
> <mengcz1...@gmail.com>
> 主题: Re: [PATCH] SG2042Pkg/Sec:Modify Calculation LowestMemSize
>
> On Mon, Mar 25, 2024 at 10:09:28AM +0800, Yang Wang wrote:
> > Adapting memory addresses may not start from 0x0,
> > for example, the starting memory address starts
> > from 0x8000_0000.
> >
> > I understand: LowestMemBase is the lowest DDR
> > address in the system.
> >
> > UefiMemoryBase = LowestMemBase +
> > CodeSize(opensbi+UEFI);
> >
> > LowestMemSize -= CodeSize(UefiMemoryBase -
> > LowestMemBase)
> >
> > Cc: Sunil V L <suni...@ventanamicro.com>
> > Cc: USER0FISH <libing1...@outlook.com>
> > Cc: caiyuqing379 <caiyuqing...@outlook.com>
> > Cc: dahogn <dah...@hotmail.com>
> > Cc: meng-cz <mengcz1...@gmail.com>
> >
> > Signed-off-by: Yang Wang <wangy...@bosc.ac.cn>
> > ---
> > Silicon/Sophgo/SG2042Pkg/Sec/Memory.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c
> > b/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c
> > index df49a17695..a160278eaa 100644
> > --- a/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c
> > +++ b/Silicon/Sophgo/SG2042Pkg/Sec/Memory.c
> > @@ -301,8 +301,8 @@ MemoryPeimInitialization (
> > }
> >
> > if (UefiMemoryBase > LowestMemBase) {
> > + LowestMemSize -= (UefiMemoryBase - LowestMemBase);
> > LowestMemBase = UefiMemoryBase;
> > - LowestMemSize -= UefiMemoryBase;
> > }
> >
> LGTM.
>
> Jingyu, Do you mind adding RB tag?
>
> Reviewed-by: Sunil V L <suni...@ventanamicro.com>
>
> Thanks!
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