I think the patch ordering relative to 3/4 breaks bisect?
/
Leif
On Wed, Mar 27, 2024 at 14:03:05 +0000, Xiong Yining wrote:
> Provide functions to check for memory information:
>
> - amount of memory nodes
> - memory address
> - NUMA node id for memory
>
> Values are read from TF-A using platform specific SMC calls.
>
> Signed-off-by: Xiong Yining <xiongyining1...@phytium.com.cn>
> Signed-off-by: Chen Baozi <chenba...@phytium.com.cn>
> Signed-off-by: Marcin Juszkiewicz <marcin.juszkiew...@linaro.org>
> Reviewed-by: Ard Biesheuvel <a...@kernel.org>
> ---
> .../Library/SbsaQemuLib/SbsaQemuLib.inf | 3 +-
> .../Include/IndustryStandard/SbsaQemuSmc.h | 2 +
> .../Include/Library/HardwareInfoLib.h | 31 +++++++++++
> .../SbsaQemuHardwareInfoLib.c | 49 +++++++++++++++++
> .../Library/SbsaQemuLib/SbsaQemuMem.c | 54 +++++--------------
> 5 files changed, 96 insertions(+), 43 deletions(-)
>
> diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
> b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
> index 07e6bc4e9b11..384cbb349200 100644
> --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
> +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
> @@ -32,14 +32,13 @@
> ArmLib
> BaseMemoryLib
> DebugLib
> + HardwareInfoLib
> MemoryAllocationLib
> PcdLib
> - SbsaQemuHardwareInfoLib
>
> [Pcd]
> gArmTokenSpaceGuid.PcdSystemMemoryBase
> gArmTokenSpaceGuid.PcdSystemMemorySize
> - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
>
> [FixedPcd]
> gArmTokenSpaceGuid.PcdFdBaseAddress
> diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
> b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
> index 2317c1f0ae69..e3092007d27d 100644
> --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
> +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
> @@ -16,6 +16,8 @@
> #define SIP_SVC_GET_GIC_ITS SMC_SIP_FUNCTION_ID(101)
> #define SIP_SVC_GET_CPU_COUNT SMC_SIP_FUNCTION_ID(200)
> #define SIP_SVC_GET_CPU_NODE SMC_SIP_FUNCTION_ID(201)
> +#define SIP_SVC_GET_MEMORY_NODE_COUNT SMC_SIP_FUNCTION_ID(300)
> +#define SIP_SVC_GET_MEMORY_NODE SMC_SIP_FUNCTION_ID(301)
>
> /*
> * SMCC does not define return codes for SiP functions.
> diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
> b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
> index 8b1b5e5e1b93..5db0eacc9d2d 100644
> --- a/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
> +++ b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
> @@ -9,6 +9,12 @@
> #ifndef HARDWARE_INFO_LIB
> #define HARDWARE_INFO_LIB
>
> +typedef struct{
> + UINT32 NodeId;
> + UINT64 AddressBase;
> + UINT64 AddressSize;
> +} MemoryInfo;
> +
> /**
> Get CPU count from information passed by Qemu.
>
> @@ -42,4 +48,29 @@ GetCpuNumaNode (
> IN UINTN CpuId
> );
>
> +/**
> + Get the number of memory node from device tree passed by Qemu.
> +
> + @retval the number of memory nodes.
> +**/
> +UINT32
> +GetMemNodeCount (
> + VOID
> + );
> +
> +/**
> + Get memory information(node-id, addressbase, addresssize) for a given
> memory node from device tree passed by Qemu.
> +
> + @param [in] MemoryId Index of memory to retrieve memory information.
> + @param [out] MemInfo A pointer to the memory information of given
> memory-id.
> +
> +
> + @retval memory infomation for given memory node.
> +**/
> +VOID
> +GetMemInfo (
> + IN UINTN MemoryId,
> + OUT MemoryInfo *MemInfo
> + );
> +
> #endif /* HARDWARE_INFO_LIB */
> diff --git
> a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
>
> b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
> index e96328978a55..b178cf6c6c43 100644
> ---
> a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
> +++
> b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
> @@ -94,3 +94,52 @@ GetCpuNumaNode (
>
> return Arg0;
> }
> +
> +UINT32
> +GetMemNodeCount (
> + VOID
> + )
> +{
> + UINTN SmcResult;
> + UINTN Arg0;
> +
> + SmcResult = ArmCallSmc0 (SIP_SVC_GET_MEMORY_NODE_COUNT, &Arg0, NULL, NULL);
> + if (SmcResult != SMC_SIP_CALL_SUCCESS) {
> + DEBUG ((DEBUG_ERROR, "%a: SIP_SVC_GET_MEMORY_NODE_COUNT call failed. We
> have no memory information.\n", __FUNCTION__));
> + ResetShutdown ();
> + }
> +
> + DEBUG (( DEBUG_INFO, "%a: The number of the memory nodes is %ld\n",
> __FUNCTION__, Arg0));
> + return (UINT32)Arg0;
> +}
> +
> +VOID
> +GetMemInfo (
> + IN UINTN MemoryId,
> + OUT MemoryInfo *MemInfo
> + )
> +{
> + UINTN SmcResult;
> + UINTN Arg0;
> + UINTN Arg1;
> + UINTN Arg2;
> +
> + Arg0 = MemoryId;
> +
> + SmcResult = ArmCallSmc1 (SIP_SVC_GET_MEMORY_NODE, &Arg0, &Arg1, &Arg2);
> + if (SmcResult != SMC_SIP_CALL_SUCCESS) {
> + DEBUG ((DEBUG_ERROR, "%a: SIP_SVC_GET_MEMORY_NODE call failed. We have
> no memory information.\n", __FUNCTION__));
> + ResetShutdown ();
> + } else {
> + MemInfo->NodeId = Arg0;
> + MemInfo->AddressBase = Arg1;
> + MemInfo->AddressSize = Arg2;
> + }
> +
> + DEBUG(( DEBUG_INFO, "%a: NUMA node for System RAM:%d = 0x%lx - 0x%lx\n",
> + __FUNCTION__,
> + MemInfo->NodeId,
> + MemInfo->AddressBase,
> + MemInfo->AddressBase + MemInfo->AddressSize -1 ));
> +
> +}
> diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c
> b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c
> index 8c2eb0b6a028..f838fdcf274d 100644
> --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c
> +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c
> @@ -12,7 +12,7 @@
> #include <Library/DebugLib.h>
> #include <Library/MemoryAllocationLib.h>
> #include <Library/PcdLib.h>
> -#include <libfdt.h>
> +#include <Library/HardwareInfoLib.h>
>
> // Number of Virtual Memory Map Descriptors
> #define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 4
> @@ -23,53 +23,25 @@ SbsaQemuLibConstructor (
> VOID
> )
> {
> - VOID *DeviceTreeBase;
> - INT32 Node, Prev;
> UINT64 NewBase, CurBase;
> UINT64 NewSize, CurSize;
> - CONST CHAR8 *Type;
> - INT32 Len;
> - CONST UINT64 *RegProp;
> + UINT32 NumMemNodes;
> + UINT32 Index;
> + MemoryInfo MemInfo;
> RETURN_STATUS PcdStatus;
>
> NewBase = 0;
> NewSize = 0;
>
> - DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress);
> - ASSERT (DeviceTreeBase != NULL);
> -
> - // Make sure we have a valid device tree blob
> - ASSERT (fdt_check_header (DeviceTreeBase) == 0);
> -
> - // Look for the lowest memory node
> - for (Prev = 0;; Prev = Node) {
> - Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
> - if (Node < 0) {
> - break;
> - }
> -
> - // Check for memory node
> - Type = fdt_getprop (DeviceTreeBase, Node, "device_type", &Len);
> - if (Type && AsciiStrnCmp (Type, "memory", Len) == 0) {
> - // Get the 'reg' property of this node. For now, we will assume
> - // two 8 byte quantities for base and size, respectively.
> - RegProp = fdt_getprop (DeviceTreeBase, Node, "reg", &Len);
> - if (RegProp != 0 && Len == (2 * sizeof (UINT64))) {
> -
> - CurBase = fdt64_to_cpu (ReadUnaligned64 (RegProp));
> - CurSize = fdt64_to_cpu (ReadUnaligned64 (RegProp + 1));
> -
> - DEBUG ((DEBUG_INFO, "%a: System RAM @ 0x%lx - 0x%lx\n",
> - __FUNCTION__, CurBase, CurBase + CurSize - 1));
> -
> - if (NewBase > CurBase || NewBase == 0) {
> - NewBase = CurBase;
> - NewSize = CurSize;
> - }
> - } else {
> - DEBUG ((DEBUG_ERROR, "%a: Failed to parse FDT memory node\n",
> - __FUNCTION__));
> - }
> + NumMemNodes = GetMemNodeCount();
> + for(Index = 0; Index < NumMemNodes; Index++){
> + GetMemInfo(Index, &MemInfo);
> + CurBase = MemInfo.AddressBase;
> + CurSize = MemInfo.AddressSize;
> +
> + if (NewBase > CurBase || NewBase == 0) {
> + NewBase = CurBase;
> + NewSize = CurSize;
> }
> }
>
> --
> 2.34.1
>
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