Hi,
On 3/11/24 09:13, Ard Biesheuvel via groups.io wrote:
On Wed, 17 Jan 2024 at 22:36, Jeremy Linton <jeremy.lin...@arm.com> wrote:The rpi's config.txt controls which uart (pl011, or miniuart) is selected as the console. TFA and edk2 follow its lead, but if the miniuart is selected as the primary and the machine is booted in ACPI mode the baud/etc is never configured for the pl011. The linux kernel won't reconfigure it either as its listed as a "SBSA" uart, so it simply won't work. This re-enables BT on the pl011 in ACPI mode, and it somewhat starts to work again. Signed-off-by: Jeremy Linton <jeremy.lin...@arm.com> --- .../DualSerialPortLib/DualSerialPortLib.c | 44 ++++++++++++------- 1 file changed, 29 insertions(+), 15 deletions(-) diff --git a/Platform/RaspberryPi/Library/DualSerialPortLib/DualSerialPortLib.c b/Platform/RaspberryPi/Library/DualSerialPortLib/DualSerialPortLib.c index d2f983bf0a..09d3e33c00 100644 --- a/Platform/RaspberryPi/Library/DualSerialPortLib/DualSerialPortLib.c +++ b/Platform/RaspberryPi/Library/DualSerialPortLib/DualSerialPortLib.c @@ -76,6 +76,8 @@ SerialPortInitialize ( EFI_PARITY_TYPE Parity; UINT8 DataBits; EFI_STOP_BITS_TYPE StopBits; + RETURN_STATUS Ret; + UINTN Timeout; // // First thing we need to do is determine which of PL011 or miniUART is selected @@ -85,23 +87,34 @@ SerialPortInitialize ( UsePl011UartSet = TRUE; } - if (UsePl011Uart) { - BaudRate = FixedPcdGet64 (PcdUartDefaultBaudRate); + // always init the pl011 on the RPi4, linux expects a SBSA uart to be at 115200 + // this means we need to set the baud/etc even if we aren't using it as a console + if ((UsePl011Uart) || (RPI_MODEL == 4)) { ReceiveFifoDepth = 0; // Use default FIFO depth + if (!UsePl011Uart) + { + BaudRate = 115200; + } + else + { + BaudRate = FixedPcdGet64 (PcdUartDefaultBaudRate); + } Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity); DataBits = FixedPcdGet8 (PcdUartDefaultDataBits); StopBits = (EFI_STOP_BITS_TYPE) FixedPcdGet8 (PcdUartDefaultStopBits); - return PL011UartInitializePort ( - PL011_UART_REGISTER_BASE, - PL011UartClockGetFreq(), - &BaudRate, - &ReceiveFifoDepth, - &Parity, - &DataBits, - &StopBits - ); - } else { + Ret = PL011UartInitializePort ( + PL011_UART_REGISTER_BASE, + PL011UartClockGetFreq(), + &BaudRate, + &ReceiveFifoDepth, + &Parity, + &DataBits, + &StopBits + ); + } + + if (!UsePl011Uart) { SerialRegisterBase = MINI_UART_REGISTER_BASE; Divisor = SerialPortGetDivisor (PcdGet32 (PcdSerialBaudRate)); @@ -127,7 +140,8 @@ SerialPortInitialize ( // Wait for the serial port to be ready. // Verify that both the transmit FIFO and the shift register are empty. // - while ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) != (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)); + Timeout = 1000; + while (((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) != (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) && (Timeout--));Why is this necessary, and what does it have to do with the rest of the patch?
I think last time I noted that it side steps a problem when both of the uarts are being unilaterally configured but the clock wasn't because the default selected in the config.txt was the pl011 (IIRC). But it shouldn't be hit by default unless the config.txt and edk2 configs is differing.
I will drop or move it, if that is whats holding up this set.
// // Configure baud rate @@ -158,9 +172,9 @@ SerialPortInitialize ( // Put Modem Control Register(MCR) into its reset state of 0x00. // SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, 0x00); - - return RETURN_SUCCESS; + Ret = RETURN_SUCCESS; } + return Ret; } /** -- 2.43.0
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