On Mon, Jan 08, 2024 at 05:06:46PM +0530, Sunil V L wrote: > This series adds the support for RISC-V Sstc extension in EDK2 timer > implementation. Sstc extension allows S-mode software to program the > timer directly without using SBI calls. > > Currently, PCD variable is used to detect whether feature is enabled. By > default the feature is enabled and platforms need to set the PCD to > disable the feature if Sstc is not supported. > > For RiscVVirtQemu, it is disabled by default (until extension discovery > feature is enabled). > > Changes since v1: > 1) Updated "PATCH 3" to address Laszlo's comments. > 2) Updated RB tag for PATCH 4. > > Cc: Andrei Warkentin <andrei.warken...@intel.com> > Cc: Ard Biesheuvel <ardb+tianoc...@kernel.org> > Cc: Gerd Hoffmann <kra...@redhat.com> > Cc: Jiewen Yao <jiewen....@intel.com> > Cc: Laszlo Ersek <ler...@redhat.com> > Cc: Rahul Kumar <rahul1.ku...@intel.com> > Cc: Ray Ni <ray...@intel.com> > Cc: Michael D Kinney <michael.d.kin...@intel.com> > Cc: Liming Gao <gaolim...@byosoft.com.cn> > Cc: Zhiguang Liu <zhiguang....@intel.com> > Thank you very much for reviews!. Merged as #5232.
Thanks, Sunil -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113616): https://edk2.groups.io/g/devel/message/113616 Mute This Topic: https://groups.io/mt/103595207/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
