Liming,
I can use another way to differentiate between interrupts and exceptions
when registering them. In this way, DebugSupport.h doesn't need to be
changed. In UEFI V2.11, I will supplement the excpetion types supported
by edk2, and adjust the max number of interrupts and exceptions.
Last question: can I add some comments in the DebugSupport.h? Of curse,
the annotation to be added doesn't appear in the UEFI V2.10.
Thanks,
Chao
On 2023/12/25 09:33, gaoliming wrote:
Chao:
I add my comments below.
*发件人:*devel@edk2.groups.io <devel@edk2.groups.io> *代表 *Chao Li
*发送时间:*2023年12月21日19:19
*收件人:*gaoliming <gaolim...@byosoft.com.cn>; devel@edk2.groups.io;
'Michael D Kinney' <michael.d.kin...@intel.com>
*抄送:*'Zhiguang Liu' <zhiguang....@intel.com>; 'Laszlo Ersek'
<ler...@redhat.com>
*主题:*Re: 回复: 回复: [edk2-devel] [PATCH v4 09/37] MdePkg: Add a new
library named PeiServicesTablePointerLibKs0
Hi Liming,
Sorry, I forget to CC you when I submitted the patch that modified the
DebugSupport.h, I originally planned to CC you when I submitted V5.
My answer:
Thanks,
Chao
On 2023/12/21 15:16, gaoliming wrote:
Chao:
For the changes in MdePkg, I have two comments here.
1.DebugSupport.h definition is from UEFI spec. Current definitions
match the latest spec UEFI2.10. And, current definitions follow
the same style to other archs.
I have submit the ECR to
USWG(https://mantis.uefi.org/mantis/view.php?id=2431), and the ECR was
marked "Added to homework pile" at 12/06/2023 USWG meeting, here is
the meeting minutes link:
https://members.uefi.org/wg/uswg/mail/thread/9948.
The USWG meeting saied may be V2.11 will release 2024, I'm not sure,
so the ECR is code first.
Can I submit the code and merge the code first, and wait for the V2.11
to be release? If we wait for the V2.11 to be release first, I guss we
will probably wait a long time. In fact, RISC-V also modified this
file when submitting the virtual-machine code, and the code does not
match to the V2.10...
So, please help to merge first, please...
[Liming] I understand current situation. Code first process is to add
the code implementation in edk2 staging branch. I may suggest to delay
this change only. Other changes can be continued to be merged.
Thanks
2.CpuLib.h. The patch removes #if defined (MDE_CPU_IA32) ||
defined (MDE_CPU_X64), then these APIs are exposed for all archs,
but ARM and RISCV don’t support them. So, I suggest to update it
as below.
#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
è
#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) || defined
(MDE_CPU_LOONGARCH64)
Agree, I will fix it in V5.
Thanks
Liming
*发件人:*Chao Li <lic...@loongson.cn> <mailto:lic...@loongson.cn>
*发送时间:*2023年12月20日9:21
*收件人:*gaoliming <gaolim...@byosoft.com.cn>
<mailto:gaolim...@byosoft.com.cn>; devel@edk2.groups.io; 'Michael
D Kinney' <michael.d.kin...@intel.com>
<mailto:michael.d.kin...@intel.com>
*抄送:*'Zhiguang Liu' <zhiguang....@intel.com>
<mailto:zhiguang....@intel.com>; 'Laszlo Ersek'
<ler...@redhat.com> <mailto:ler...@redhat.com>
*主题:*Re: 回复: [edk2-devel] [PATCH v4 09/37] MdePkg: Add a new
library named PeiServicesTablePointerLibKs0
Hi Liming,
Yes, the code branch is in my private repo, here is the link:
https://github.com/kilaterlee/edk2/tree/push1102
Thanks,
Chao
On 2023/12/19 21:07, gaoliming wrote:
Chao:
Is there a branch or pull request for this patch set? I would
like to check how this new library instance be used.
Thanks
Liming
*发件人:*devel@edk2.groups.io <devel@edk2.groups.io>
<mailto:devel@edk2.groups.io> *代表 *Chao Li
*发送时间:*2023年12月19日21:01
*收件人:*devel@edk2.groups.io; Michael D Kinney
<michael.d.kin...@intel.com>
<mailto:michael.d.kin...@intel.com>; Liming Gao
<gaolim...@byosoft.com.cn> <mailto:gaolim...@byosoft.com.cn>
*抄送:*Zhiguang Liu <zhiguang....@intel.com>
<mailto:zhiguang....@intel.com>; Laszlo Ersek
<ler...@redhat.com> <mailto:ler...@redhat.com>
*主题:*Re: [edk2-devel] [PATCH v4 09/37] MdePkg: Add a new
library named PeiServicesTablePointerLibKs0
Hi Mike and Liming,
Can you please review this patch? Thank you!
Thanks,
Chao
On 2023/12/12 21:11, Chao Li wrote:
Adding PeiServicesTablePointerLibKs0 for LoongArch64,
which provides
setting and getting the PEI service table pointer through
the CSR KS0
register.
The idea of this library is derived from
ArmPkg/Library/PeiServicesTablePointerLib/
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Michael D Kinney <michael.d.kin...@intel.com>
<mailto:michael.d.kin...@intel.com>
Cc: Liming Gao <gaolim...@byosoft.com.cn>
<mailto:gaolim...@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang....@intel.com>
<mailto:zhiguang....@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
<mailto:ler...@redhat.com>
Signed-off-by: Chao Li <lic...@loongson.cn>
<mailto:lic...@loongson.cn>
---
.../Library/PeiServicesTablePointerLib.h | 9 +-
.../PeiServicesTablePointer.c | 87
+++++++++++++++++++
.../PeiServicesTablePointerLibKs0.inf | 37 ++++++++
.../PeiServicesTablePointerLibKs0.uni | 20 +++++
MdePkg/MdePkg.dsc | 3 +
5 files changed, 152 insertions(+), 4 deletions(-)
create mode 100644
MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c
create mode 100644
MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf
create mode 100644
MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.uni
diff --git
a/MdePkg/Include/Library/PeiServicesTablePointerLib.h
b/MdePkg/Include/Library/PeiServicesTablePointerLib.h
index 61635eff00..f85c38363c 100644
--- a/MdePkg/Include/Library/PeiServicesTablePointerLib.h
+++ b/MdePkg/Include/Library/PeiServicesTablePointerLib.h
@@ -52,10 +52,11 @@ SetPeiServicesTablePointer (
immediately preceding the Interrupt Descriptor Table
(IDT) in memory.
For X64 CPUs, the PEI Services Table pointer is stored
in the 8 bytes
immediately preceding the Interrupt Descriptor Table
(IDT) in memory.
- For Itanium and ARM CPUs, a the PEI Services Table
Pointer is stored in
- a dedicated CPU register. This means that there is no
memory storage
- associated with storing the PEI Services Table pointer,
so no additional
- migration actions are required for Itanium or ARM CPUs.
+ For Itanium, ARM and LoongArch CPUs, a the PEI Services
Table Pointer
+ is stored in a dedicated CPU register. This means that
there is no
+ memory storage associated with storing the PEI Services
Table pointer,
+ so no additional migration actions are required for
Itanium, ARM and
+ LoongArch CPUs.
**/
VOID
diff --git
a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c
b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c
new file mode 100644
index 0000000000..2560b232f9
--- /dev/null
+++
b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c
@@ -0,0 +1,87 @@
+/** @file
+ PEI Services Table Pointer Library For Reigseter Mechanism.
+
+ This library is used for PEIM which does executed from
flash device directly but
+ executed in memory.
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All
rights reserved.<BR>
+ Copyright (c) 2011 Hewlett-Packard Corporation. All
rights reserved.<BR>
+ Copyright (c) 2023 Loongson Technology Corporation
Limited. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiPei.h>
+#include <Library/DebugLib.h>
+#include <Library/PeiServicesTablePointerLib.h>
+#include <Register/LoongArch64/Csr.h>
+
+/**
+ Caches a pointer PEI Services Table.
+
+ Caches the pointer to the PEI Services Table specified
by PeiServicesTablePointer
+ in a platform specific manner.
+
+ If PeiServicesTablePointer is NULL, then ASSERT().
+
+ @param PeiServicesTablePointer The address of
PeiServices pointer.
+**/
+VOID
+EFIAPI
+SetPeiServicesTablePointer (
+ IN CONST EFI_PEI_SERVICES **PeiServicesTablePointer
+ )
+{
+ ASSERT (PeiServicesTablePointer != NULL);
+ CsrWrite (LOONGARCH_CSR_KS0,
(UINTN)PeiServicesTablePointer);
+}
+
+/**
+ Retrieves the cached value of the PEI Services Table
pointer.
+
+ Returns the cached value of the PEI Services Table
pointer in a CPU specific manner
+ as specified in the CPU binding section of the Platform
Initialization Pre-EFI
+ Initialization Core Interface Specification.
+
+ If the cached PEI Services Table pointer is NULL, then
ASSERT().
+
+ @return The pointer to PeiServices.
+
+**/
+CONST EFI_PEI_SERVICES **
+EFIAPI
+GetPeiServicesTablePointer (
+ VOID
+ )
+{
+ CONST EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = (CONST EFI_PEI_SERVICES **)(CsrRead
(LOONGARCH_CSR_KS0));
+ ASSERT (PeiServices != NULL);
+ return PeiServices;
+}
+
+/**
+ Perform CPU specific actions required to migrate the
PEI Services Table
+ pointer from temporary RAM to permanent RAM.
+
+ For IA32 CPUs, the PEI Services Table pointer is stored
in the 4 bytes
+ immediately preceding the Interrupt Descriptor Table
(IDT) in memory.
+ For X64 CPUs, the PEI Services Table pointer is stored
in the 8 bytes
+ immediately preceding the Interrupt Descriptor Table
(IDT) in memory.
+ For Itanium, ARM and LoongArch CPUs, a the PEI Services
Table Pointer
+ is stored in a dedicated CPU register. This means that
there is no
+ memory storage associated with storing the PEI Services
Table pointer,
+ so no additional migration actions are required for
Itanium, ARM and
+ LoongArch CPUs.
+
+**/
+VOID
+EFIAPI
+MigratePeiServicesTablePointer (
+ VOID
+ )
+{
+ return;
+}
diff --git
a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf
b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf
new file mode 100644
index 0000000000..e8ecd4616d
--- /dev/null
+++
b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf
@@ -0,0 +1,37 @@
+## @file
+# Instance of PEI Services Table Pointer Library using
register CSR KS0 for the table pointer.
+#
+# PEI Services Table Pointer Library implementation that
retrieves a pointer to the
+# PEI Services Table from a CPU register. Applies to
modules that execute from
+# read-only memory.
+#
+# Copyright (c) 2007 - 2018, Intel Corporation. All
rights reserved.<BR>
+# Copyright (c) 2011 Hewlett-Packard Corporation. All
rights reserved.<BR>
+# Copyright (c) 2023 Loongson Technology Corporation
Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+##
+
+[Defines]
+ INF_VERSION = 1.29
+ BASE_NAME = PeiServicesTablePointerLib
+ MODULE_UNI_FILE =
PeiServicesTablePointerLibKs0.uni
+ FILE_GUID =
619950D1-7C5F-EA1B-D6DD-2FF7B0A4A2B7
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS =
PeiServicesTablePointerLib|PEIM PEI_CORE SEC
+
+#
+# VALID_ARCHITECTURES = LOONGARCH64
+#
+
+[Sources]
+ PeiServicesTablePointer.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ DebugLib
diff --git
a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.uni
b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.uni
new file mode 100644
index 0000000000..2539448ce5
--- /dev/null
+++
b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.uni
@@ -0,0 +1,20 @@
+// /** @file
+// Instance of PEI Services Table Pointer Library using
register CSR KS0 for the table pointer.
+//
+// PEI Services Table Pointer Library implementation that
retrieves a pointer to the
+// PEI Services Table from a CPU register. Applies to
modules that execute from
+// read-only memory.
+//
+// Copyright (c) 2007 - 2018, Intel Corporation. All
rights reserved.<BR>
+// Copyright (c) 2011 Hewlett-Packard Corporation. All
rights reserved.<BR>
+// Copyright (c) 2023 Loongson Technology Corporation
Limited. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US
"Instance of PEI Services Table Pointer Library using CPU
register for the table pointer"
+
+#string STR_MODULE_DESCRIPTION #language en-US
"The PEI Services Table Pointer Library implementation
that retrieves a pointer to the PEI Services Table from a
CPU register. Applies to modules that execute from
read-only memory."
+
diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc
index 3abd1a1e23..109224c527 100644
--- a/MdePkg/MdePkg.dsc
+++ b/MdePkg/MdePkg.dsc
@@ -200,4 +200,7 @@
MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLib.inf
MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLibRam.inf
+[Components.LOONGARCH64]
+
MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf
+
[BuildOptions]
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